| /linux-4.1.27/arch/sh/drivers/dma/ |
| H A D | dmabrg.c | 27 * 2 | HAC0/SSI0 | play| all done | DMABRGI1
28 * 3 | HAC0/SSI0 | play| half done | DMABRGI2
29 * 4 | HAC0/SSI0 | rec | all done | DMABRGI1
30 * 5 | HAC0/SSI0 | rec | half done | DMABRGI2
|
| /linux-4.1.27/arch/sh/kernel/cpu/sh4/ |
| H A D | setup-sh7760.c | 26 SSI0, SSI1, enumerator in enum:__anon2625
55 INTC_VECT(SSI0, 0x940), INTC_VECT(SSI1, 0x960),
92 SSI0, SSI1, HAC0, HAC1, I2C0, I2C1, USB, LCDC,
111 { 0xfe080004, 0, 32, 4, /* INTPRI04 */ { HCAN20, HCAN21, SSI0, SSI1,
|
| /linux-4.1.27/arch/sh/kernel/cpu/sh4a/ |
| H A D | setup-sh7763.c | 250 TMU3, TMU4, TMU5, ADC, SSI0, SSI1, SSI2, SSI3, enumerator in enum:__anon2660
293 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
309 SSI0, MMCIF, 0, SIOF0, PCIC5, PCIINTD, PCIINTC, PCIINTB,
329 { 0xffd40018, 0, 32, 8, /* INT2PRI6 */ { SIOF0, USBF, MMCIF, SSI0 } },
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| H A D | setup-sh7785.c | 391 SSI0, SSI1, enumerator in enum:__anon2663
433 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
461 { 0, 0, 0, GDTA, DU, SSI0, SSI1, GPIO,
482 { 0xffd40020, 0, 32, 8, /* INT2PRI8 */ { FLCTL, GPIO, SSI0, SSI1, } },
|
| H A D | setup-sh7734.c | 316 SSI0, SSI1, SSI2, SSI3, enumerator in enum:__anon2658
391 INTC_VECT(SSI0, 0x6C0),
447 INTC_GROUP(SSI, SSI0, SSI1, SSI2, SSI3),
|
| H A D | setup-sh7786.c | 498 SSI0, SSI1, SSI2, SSI3, enumerator in enum:__anon2664
541 INTC_VECT(SSI0, 0xd20), INTC_VECT(SSI1, 0xd40),
614 DU, SSI0, SSI1, SSI2, SSI3,
653 { 0xfe41084c, 0, 32, 8, /* INT2PRI19 */ { DU, SSI0, SSI1, SSI2 } },
|
| /linux-4.1.27/sound/soc/fsl/ |
| H A D | mx27vis-aic32x4.c | 198 /* Connect SSI0 as clock slave to SSI1 external pins */ mx27vis_aic32x4_probe()
|
| H A D | wm1133-ev1.c | 257 /* SSI0 mastered by port 5 */ wm1133_ev1_audio_init()
|
| /linux-4.1.27/arch/mips/alchemy/devboards/ |
| H A D | db1000.c | 522 /* spi_gpio on SSI0 pins */ db1000_dev_setup()
524 pfc |= (1 << 0); /* SSI0 pins as GPIOs */ db1000_dev_setup()
|
| /linux-4.1.27/arch/arm/mach-shmobile/ |
| H A D | clock-r8a7778.c | 164 [MSTP012] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 12, 0), /* SSI0 */
|