Searched refs:SSE (Results 1 – 9 of 9) sorted by relevance
126 jz verify_cpu_no_longmode # only try to force SSE on AMD129 btr $15,%eax # enable SSE
2 # Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
598 #define SSE 0x40 macro1949 if (status1 & SSE) { in ahc_pci_intr()1970 if ((status1 & (DPE|SSE|RMA|RTA|STA|DPR)) == 0) { in ahc_pci_intr()
1144 field SSE 0x401162 field SSE 0x401179 field SSE 0x401195 field SSE 0x401212 field SSE 0x401227 field SSE 0x401244 field SSE 0x40
740 #define SSE 0x40 macro
2182 #define SSE 0x40
58 ## code to compute oct SHA1 using SSE-256
233 of SSE and tells gcc to treat the CPU as a 686.
1653 D: Pentium III FXSR, SSE support