Searched refs:SET_REG (Results 1 - 3 of 3) sorted by relevance
| /linux-4.1.27/sound/pci/hda/ |
| H A D | patch_si3054.c | 79 #define SET_REG(codec,reg,val) (snd_hda_codec_write(codec,reg,0,SI3054_VERB_WRITE_NODE,val)) macro
157 SET_REG(codec, SI3054_LINE_RATE, substream->runtime->rate); si3054_pcm_prepare()
161 SET_REG(codec, SI3054_LINE_LEVEL, val); si3054_pcm_prepare()
231 SET_REG(codec, SI3054_LINE_RATE, 9600); si3054_init()
232 SET_REG(codec, SI3054_LINE_LEVEL, SI3054_DTAG_MASK|SI3054_ATAG_MASK); si3054_init()
233 SET_REG(codec, SI3054_EXTENDED_MID, 0); si3054_init()
247 SET_REG(codec, SI3054_GPIO_POLARITY, 0xffff); si3054_init()
248 SET_REG(codec, SI3054_GPIO_CFG, 0x0); si3054_init()
249 SET_REG(codec, SI3054_MISC_AFE, 0); si3054_init()
250 SET_REG(codec, SI3054_LINE_CFG1,0x200); si3054_init()
|
| /linux-4.1.27/drivers/clocksource/ |
| H A D | asm9260_timer.c | 32 #define SET_REG 4 macro
119 writel_relaxed(BM_C0_EN, priv.base + HW_TCR + SET_REG); asm9260_timer_set_next_event()
137 writel_relaxed(BM_C0_EN, priv.base + HW_TCR + SET_REG); asm9260_timer_set_mode()
142 priv.base + HW_MCR + SET_REG); asm9260_timer_set_mode()
213 writel_relaxed(BM_C1_EN, priv.base + HW_TCR + SET_REG); asm9260_timer_init()
|
| /linux-4.1.27/arch/ia64/kernel/ |
| H A D | head.S | 1099 #define SET_REG(reg) \ define
1107 SET_REG(b1);
1108 SET_REG(b2);
1109 SET_REG(b3);
1110 SET_REG(b4);
1111 SET_REG(b5);
|
Completed in 113 milliseconds