Searched refs:SD0CKCR (Results 1 – 2 of 2) sorted by relevance
32 #define SD0CKCR IOMEM(0xe6150074) macro407 [DIV6_SDHI0] = SH_CLK_DIV6_EXT(SD0CKCR, 0,708 __raw_writel(0x108, SD0CKCR); in sh73a0_clock_init()
100 #define SD0CKCR (CPG_BASE + 0x0074)197 ED SD0CKCR, 0x00000080