Searched refs:SAIF (Results 1 - 5 of 5) sorted by relevance
/linux-4.1.27/drivers/clk/mxs/ |
H A D | clk-imx23.c | 39 #define SAIF (CLKCTRL + 0x00c0) macro 58 /* Clear BYPASS for SAIF */ clk_misc_init() 61 /* SAIF has to use frac div for functional operation */ clk_misc_init() 62 val = readl_relaxed(SAIF); clk_misc_init() 64 writel_relaxed(val, SAIF); clk_misc_init() 142 clks[saif_div] = mxs_clk_frac("saif_div", "saif_sel", SAIF, 0, 16, 29); mx23_clocks_init() 156 clks[saif] = mxs_clk_gate("saif", "saif_div", SAIF, 31); mx23_clocks_init()
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H A D | clk-imx28.c | 95 /* Clear BYPASS for SAIF */ clk_misc_init() 98 /* SAIF has to use frac div for functional operation */ clk_misc_init()
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/linux-4.1.27/sound/soc/mxs/ |
H A D | mxs-saif.c | 43 * SAIF is a little different with other normal SOC DAIs on clock using. 45 * For MXS, two SAIF modules are instantiated on-chip. 46 * Each SAIF has a set of clock pins and can be operating in master 49 * other SAIF, in slave mode, receives clocking from the master SAIF. 76 * Since SAIF may work on EXTMASTER mode, IOW, it's working BITCLK&LRCLK 77 * is provided by other SAIF, we provide a interface here to get its master 87 * Set SAIF clock and MCLK 119 * Set SAIF clock mxs_saif_set_clk() 121 * The SAIF clock should be either 384*fs or 512*fs. mxs_saif_set_clk() 122 * If MCLK is used, the SAIF clk ratio need to match mclk ratio. mxs_saif_set_clk() 138 /* SAIF MCLK should be either 32x or 48x */ mxs_saif_set_clk() 287 * SAIF DAI format configuration. 345 * Note: We simply just support master mode since SAIF TX can only mxs_saif_set_dai_fmt() 825 MODULE_DESCRIPTION("MXS ASoC SAIF driver");
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H A D | mxs-sgtl5000.c | 52 /* Set SGTL5000's SYSCLK (provided by SAIF MCLK) */ mxs_sgtl5000_hw_params() 60 /* The SAIF MCLK should be the same as SGTL5000_SYSCLK */ mxs_sgtl5000_hw_params()
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/linux-4.1.27/arch/arm/mach-mxs/ |
H A D | mach-mxs.c | 35 /* MXS DIGCTL SAIF CLKMUX */
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