Searched refs:RT3352_CLKCFG0_XTAL_SEL (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-ralink/
H A Drt305x.h158 #define RT3352_CLKCFG0_XTAL_SEL BIT(20) macro
/linux-4.1.27/arch/mips/ralink/
H A Drt305x.c199 if (!(val & RT3352_CLKCFG0_XTAL_SEL)) ralink_clk_init()

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