| /linux-4.1.27/arch/cris/arch-v32/mach-a3/ |
| H A D | arbiter.c | 274 REG_WR_INT(marb_bar, regi_marb_bar, rw_h264_rd_burst, 3); crisv32_arbiter_init()
275 REG_WR_INT(marb_bar, regi_marb_bar, rw_h264_wr_burst, 3); crisv32_arbiter_init()
276 REG_WR_INT(marb_bar, regi_marb_bar, rw_ccd_burst, 3); crisv32_arbiter_init()
277 REG_WR_INT(marb_bar, regi_marb_bar, rw_vin_wr_burst, 3); crisv32_arbiter_init()
278 REG_WR_INT(marb_bar, regi_marb_bar, rw_vin_rd_burst, 3); crisv32_arbiter_init()
279 REG_WR_INT(marb_bar, regi_marb_bar, rw_sclr_rd_burst, 3); crisv32_arbiter_init()
280 REG_WR_INT(marb_bar, regi_marb_bar, rw_vout_burst, 3); crisv32_arbiter_init()
281 REG_WR_INT(marb_bar, regi_marb_bar, rw_sclr_fifo_burst, 3); crisv32_arbiter_init()
282 REG_WR_INT(marb_bar, regi_marb_bar, rw_l2cache_burst, 3); crisv32_arbiter_init()
407 REG_WR_INT(marb_bar_bp, crisv32_arbiter_watch()
411 REG_WR_INT(marb_bar_bp, crisv32_arbiter_watch()
415 REG_WR_INT(marb_bar_bp, crisv32_arbiter_watch()
418 REG_WR_INT(marb_bar_bp, crisv32_arbiter_watch()
423 REG_WR_INT(marb_foo_bp, crisv32_arbiter_watch()
427 REG_WR_INT(marb_foo_bp, crisv32_arbiter_watch()
431 REG_WR_INT(marb_foo_bp, crisv32_arbiter_watch()
434 REG_WR_INT(marb_foo_bp, crisv32_arbiter_watch()
449 REG_WR_INT(marb_bar, regi_marb_bar, crisv32_arbiter_watch()
452 REG_WR_INT(marb_foo, regi_marb_foo, crisv32_arbiter_watch()
509 REG_WR_INT(marb_bar, regi_marb_bar, rw_intr_mask, crisv32_arbiter_unwatch()
512 REG_WR_INT(marb_foo, regi_marb_foo, rw_intr_mask, crisv32_arbiter_unwatch()
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| H A D | pinmux.c | 38 REG_WR_INT(pinmux, regi_pinmux, rw_hwprot, 0); crisv32_pinmux_init()
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| /linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/ |
| H A D | iop_version_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sap_in_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sap_out_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sw_spu_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sw_cfg_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sw_cpu_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sw_mpu_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| /linux-4.1.27/arch/cris/arch-v32/drivers/ |
| H A D | iop_fw_load.c | 111 REG_WR_INT(iop_spu, regi_iop_spu0, rw_seq_pc, (i*4)); iop_fw_load_spu()
114 REG_WR_INT(iop_spu, regi_iop_spu1, rw_seq_pc, (i*4)); iop_fw_load_spu()
117 REG_WR_INT(iop_sw_cpu, regi_iop_sw_cpu, rw_mc_data, *data); iop_fw_load_spu()
158 REG_WR_INT(iop_mpu, regi_iop_mpu, rw_immediate, *data); iop_fw_load_mpu()
183 REG_WR_INT(iop_mpu, regi_iop_mpu, rw_instr, MPU_BA_I(start_addr)); iop_start_mpu()
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| /linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/ |
| H A D | dma.h | 108 do { REG_WR_INT( dma, inst, rw_group, (int) group_descr ); \
116 do { REG_WR_INT( dma, inst, rw_group_down, (int) ctx_descr ); \
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| H A D | irq_nmi_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | strcop_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | config_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | rt_trace_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | ata_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | bif_slave_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | marb_bp_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | marb_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
307 #ifndef REG_WR_INT
308 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | bif_core_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | eth_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | extmem_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | ser_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | sser_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | bif_dma_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | dma_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| /linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/ |
| H A D | iop_version_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_fifo_in_extra_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_fifo_out_extra_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_scrc_in_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_scrc_out_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_trigger_grp_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_crc_par_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_fifo_in_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_mpu_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sap_in_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_timer_grp_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_dmc_in_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_dmc_out_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_fifo_out_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sap_out_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_spu_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sw_spu_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sw_cfg_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sw_cpu_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sw_mpu_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| /linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
| H A D | strmux_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | clkgen_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | l2cache_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | marb_bar_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
329 #ifndef REG_WR_INT
330 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | marb_foo_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
455 #ifndef REG_WR_INT
456 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | ddr2_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | intr_vect_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | pinmux_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | pio_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | timer_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | gio_defs.h | 45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| /linux-4.1.27/arch/cris/arch-v32/kernel/ |
| H A D | debugport.c | 183 REG_WR_INT(ser, kgdb_port->instance, rw_dout, val); putDebugChar()
194 REG_WR_INT(ser, port->instance, rw_dout, c); early_putch()
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| /linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/ |
| H A D | config_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
|
| H A D | strmux_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | bif_slave_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | intr_vect_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | marb_bp_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | marb_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
307 #ifndef REG_WR_INT
308 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | bif_core_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | gio_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | pinmux_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | timer_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | bif_dma_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| /linux-4.1.27/arch/cris/arch-v32/mach-fs/ |
| H A D | arbiter.c | 289 REG_WR_INT(marb_bp, watches[i].instance, rw_first_addr, crisv32_arbiter_watch()
291 REG_WR_INT(marb_bp, watches[i].instance, rw_last_addr, crisv32_arbiter_watch()
293 REG_WR_INT(marb_bp, watches[i].instance, rw_op, crisv32_arbiter_watch()
295 REG_WR_INT(marb_bp, watches[i].instance, rw_clients, crisv32_arbiter_watch()
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| H A D | pinmux.c | 58 REG_WR_INT(pinmux, regi_pinmux, rw_hwprot, 0); crisv32_pinmux_init()
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| /linux-4.1.27/arch/cris/arch-v32/drivers/mach-a3/ |
| H A D | gpio.c | 220 REG_WR_INT(gio, regi_gio, rw_intr_cfg, intr_cfg); gpio_set_alarm()
221 REG_WR_INT(gio, regi_gio, rw_intr_pins, pins); gpio_set_alarm()
222 REG_WR_INT(gio, regi_gio, rw_intr_mask, mask); gpio_set_alarm()
241 REG_WR_INT(gio, regi_gio, rw_ack_intr, wanted_interrupts); gpio_poll()
245 REG_WR_INT(gio, regi_gio, rw_intr_mask, tmp); gpio_poll()
988 REG_WR_INT(gio, regi_gio, rw_intr_pins, 0); gpio_init()
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| /linux-4.1.27/drivers/tty/serial/ |
| H A D | etraxfs-uart.c | 76 REG_WR_INT(ser, up->regi_ser, rw_dout, '\r'); cris_console_write()
82 REG_WR_INT(ser, up->regi_ser, rw_dout, s[i]); cris_console_write()
639 REG_WR_INT(ser, up->regi_ser, rw_dout, c); etraxfs_uart_put_poll_char()
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