Searched refs:PTE (Results 1 – 24 of 24) sorted by relevance
177 ; OUT: r0 = PTE faulted on, r1 = ptr to PTE, r2 = Faulting V-address196 ; Get the PTE entry: The idea is204 ld.aw r0, [r1, r0] ; get PTE and PTE ptr for fault addr217 ; Convert Linux PTE entry into TLB entry218 ; A one-word PTE entry is programmed as two-word TLB Entry [PD0:PD1] in mmu219 ; IN: r0 = PTE, r1 = ptr to PTE227 and r3, r0, PTE_BITS_NON_RWX_IN_PD1 ; Extract PFN+cache bits from PTE232 and r2, r0, PTE_BITS_IN_PD0 ; Extract other PTE flags: (V)alid, (G)lb274 ; Get the PTE corresponding to V-addr accessed, r2 is setup with EFA278 ; VERIFY_PTE: Check if PTE permissions approp for executing code[all …]
10 access to the table. At the moment we use split lock for PTE and PMD15 maps pte and takes PTE table lock, returns pointer to the taken18 unlocks and unmaps PTE table;20 allocates PTE table if needed and take the lock, returns pointer23 returns pointer to PTE table lock;29 Split page table lock for PTE tables is enabled compile-time if33 Split page table lock for PMD tables is enabled, if it's enabled for PTE52 There's no need in special enabling of PTE split page table lock:54 which must be called on PTE table allocation / freeing.91 The spinlock_t allocated in pgtable_page_ctor() for PTE table and in
3 The soft-dirty is a bit on a PTE which helps to track which pages a task16 64-bit qword is the soft-dirty one. If set, the respective PTE was23 the soft-dirty bit on the respective PTE.29 bits on the PTE.34 the same place. When unmap is called, the kernel internally clears PTE values
12 PTE for this purpose. PTE flags are scarce resource especially on some CPU
50 During a page fault on a PTE that is a swap entry, frontswap calls the zswap
156 advantage is that PAE has more PTE bits and can provide advanced features
71 #define pmd_populate_kernel(MM, PMD, PTE) pmd_set(MM, PMD, PTE) argument72 #define pmd_populate(MM, PMD, PTE) pmd_set(MM, PMD, PTE) argument
58 #define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE) argument
141 .macro PTE va, cpa, bits1, no_org=0 macro160 PTE addr + PAGE_OFFSET, addr, (1 << (HV_PTE_INDEX_READABLE - 32)) | \166 PTE MEM_SV_START, 0, (1 << (HV_PTE_INDEX_READABLE - 32)) | \180 PTE 0, 0, (1 << (HV_PTE_INDEX_READABLE - 32)) | \
220 .macro PTE cpa, bits1 macro247 PTE addr, HV_PTE_READABLE | HV_PTE_WRITABLE262 PTE addr, HV_PTE_READABLE | HV_PTE_EXECUTABLE
60 ; 1. PMD and PTE exists in mm subsystem but not in TLB61 ; 2. PMD exists but not PTE76 ; Each page is 8 KB. Each PMD holds 8192/4 PTEs (each PTE is 4 bytes) so each79 ; Bits 13-23 : PTE offset within a PMD126 ; Look up PTE in PMD129 and.d 0x7ff, $r0 ; Get PTE index into PMD (bit 13-23)131 move.d [$acr], $acr ; Get PTE179 9: ; PTE missing, let the mm subsystem fix it up.
160 # - the PTE must be marked accessed if it was valid216 # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more303 # - punt the entry here (if valid) to the real TLB and then replace with the new PTE345 # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more430 # - punt the entry here (if valid) to the real TLB and then replace with the new PTE463 # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more550 # - punt the entry here (if valid) to the real TLB and then replace with the new PTE583 # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more
39 } PTE; typedef
10 This check can spot missing TLB invalidation/wrong PTE permissions/
102 DMAR:[fault reason 05] PTE Write access is not set104 DMAR:[fault reason 05] PTE Write access is not set
3845 [X86] Flags controlling user PTE allocations.3847 nohigh = do not allocate PTE pages in
97 #error PTE shared bit mismatch102 #error Invalid Linux PTE bit settings
81 mov %g3, %o2 ! PTE124 mov %g3, %o2 ! PTE
50 Purpose: Support MMU operations such as writing to PTE,
2258 corresponding encoding in the hash PTE. Similarly, the array is2268 PTE's RPN field (ie, it needs to be shifted left by 12 to OR it2269 into the hash PTE second double word).
376 and.d 0x7ff, $r1 ; Get PTE index into PGD (bit 13-23)377 move.d [$r0+$r1.d], $r1 ; Get PTE387 2: ; PMD or PTE missing, let the mm subsystem fix it up.
150 Paging - PTE's, PMD's and PGD's175 PGD PTE page offset
92 addresses by installing a PTE in a special page table. The kernel can then access this page as it93 wills. When it's finished, the kernel calls kunmap() to clear the PTE.
51 also save system registers, and hardware PTE's.