Searched refs:POWER0_COM_DCLK (Results 1 – 1 of 1) sorted by relevance
54 #define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */ macro124 lcdtg_ssp_i2c_send(lcd, data | POWER0_COM_DCLK); in lcdtg_i2c_send_bit()130 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK | POWER0_COM_DOUT); in lcdtg_i2c_send_start()131 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK); in lcdtg_i2c_send_start()138 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK); in lcdtg_i2c_send_stop()139 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK | POWER0_COM_DOUT); in lcdtg_i2c_send_stop()224 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF | in corgi_lcd_power_on()237 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | in corgi_lcd_power_on()255 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | in corgi_lcd_power_on()268 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | in corgi_lcd_power_on()