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Searched refs:PEEK32 (Results 1 – 10 of 10) sorted by relevance

/linux-4.1.27/drivers/staging/sm750fb/
Dddk750_display.c20 ulDisplayCtrlReg = PEEK32(PANEL_DISPLAY_CTRL); in setDisplayControl()
52 } while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != in setDisplayControl()
78 ulDisplayCtrlReg = PEEK32(CRT_DISPLAY_CTRL); in setDisplayControl()
107 } while((PEEK32(CRT_DISPLAY_CTRL) & ~ulReservedBits) != in setDisplayControl()
140 if ((FIELD_GET(PEEK32(PANEL_PLL_CTRL), PANEL_PLL_CTRL, POWER) == in waitNextVerticalSync()
142 (FIELD_GET(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, TIMING) == in waitNextVerticalSync()
153 status = FIELD_GET(PEEK32(SYSTEM_CTRL), in waitNextVerticalSync()
162 status = FIELD_GET(PEEK32(SYSTEM_CTRL), in waitNextVerticalSync()
173 if ((FIELD_GET(PEEK32(CRT_PLL_CTRL), CRT_PLL_CTRL, POWER) == in waitNextVerticalSync()
175 (FIELD_GET(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, TIMING) == in waitNextVerticalSync()
[all …]
Dddk750_chip.c61 ulPllReg = PEEK32(MXCLK_PLL_CTRL); in getPllValue()
64 ulPllReg = PEEK32(PANEL_PLL_CTRL); in getPllValue()
67 ulPllReg = PEEK32(CRT_PLL_CTRL); in getPllValue()
70 ulPllReg = PEEK32(VGA_PLL0_CTRL); in getPllValue()
73 ulPllReg = PEEK32(VGA_PLL1_CTRL); in getPllValue()
152 ulReg = PEEK32(CURRENT_GATE); in setMemoryClock()
200 ulReg = PEEK32(CURRENT_GATE); in setMasterClock()
232 reg = PEEK32(MODE0_GATE); in ddk750_getVMSize()
237 reg = FIELD_GET(PEEK32(MISC_CTRL), MISC_CTRL, LOCALMEM_SIZE); in ddk750_getVMSize()
263 ulReg = PEEK32(0x74); in ddk750_initHw()
[all …]
Dddk750_power.c9 value = PEEK32(CRT_DISPLAY_CTRL); in ddk750_setDPMS()
12 value = PEEK32(SYSTEM_CTRL); in ddk750_setDPMS()
22 return (FIELD_GET(PEEK32(POWER_MODE_CTRL), POWER_MODE_CTRL, MODE)); in getPowerMode()
34 control_value = PEEK32(POWER_MODE_CTRL); in setPowerMode()
113 gate = PEEK32(CURRENT_GATE); in enable2DEngine()
137 gate = PEEK32(CURRENT_GATE); in enableZVPort()
165 gate = PEEK32(CURRENT_GATE); in enableSSP()
179 gate = PEEK32(CURRENT_GATE); in enableDMA()
196 gate = PEEK32(CURRENT_GATE); in enableGPIO()
213 gate = PEEK32(CURRENT_GATE); in enablePWM()
[all …]
Dsm750_hw.c125 FIELD_SET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, PCI_BURST, ON)); in hw_sm750_inithw()
139 FIELD_SET(PEEK32(MISC_CTRL), in hw_sm750_inithw()
144 FIELD_SET(PEEK32(SYSTEM_CTRL), in hw_sm750_inithw()
149 FIELD_SET(PEEK32(MISC_CTRL), in hw_sm750_inithw()
154 FIELD_SET(PEEK32(SYSTEM_CTRL), in hw_sm750_inithw()
164 FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), in hw_sm750_inithw()
253 reg = PEEK32(DISPLAY_CONTROL_750LE); in hw_sm750_output_setMode()
389 reg = PEEK32(PANEL_DISPLAY_CTRL); in hw_sm750_crtc_setMode()
407 reg = PEEK32(CRT_DISPLAY_CTRL); in hw_sm750_crtc_setMode()
480 POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms)); in hw_sm750le_setBLANK()
[all …]
Dddk750_hwi2c.c19 value = PEEK32(GPIO_MUX); in hwI2CInit()
31 value = PEEK32(I2C_CTRL); in hwI2CInit()
48 value = PEEK32(I2C_CTRL); in hwI2CClose()
56 value = PEEK32(GPIO_MUX); in hwI2CClose()
69 while ((FIELD_GET(PEEK32(I2C_STATUS), I2C_STATUS, TX) != I2C_STATUS_TX_COMPLETED) && in hwI2CWaitTXDone()
126 POKE32(I2C_CTRL, FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START)); in hwI2CWriteData()
189 POKE32(I2C_CTRL, FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START)); in hwI2CReadData()
197 *pBuffer++ = PEEK32(I2C_DATA0 + i); in hwI2CReadData()
Dddk750_swi2c.c128 ulGPIODirection = PEEK32(g_i2cClkGPIODataDirReg); in swI2CSCL()
138 ulGPIOData = PEEK32(g_i2cClkGPIODataReg); in swI2CSCL()
165 ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg); in swI2CSDA()
175 ulGPIOData = PEEK32(g_i2cDataGPIODataReg); in swI2CSDA()
197 ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg); in swI2CReadSDA()
205 ulGPIOData = PEEK32(g_i2cDataGPIODataReg); in swI2CReadSDA()
432 PEEK32(g_i2cClkGPIOMuxReg) & ~(1 << g_i2cClockGPIO)); in swI2CInit()
434 PEEK32(g_i2cDataGPIOMuxReg) & ~(1 << g_i2cDataGPIO)); in swI2CInit()
Dddk750_help.h15 #define PEEK32(addr) __raw_readl(mmio750 + addr)
18 #define PEEK32(addr) readl(addr + mmio750) macro
Dddk750_mode.c113 ulReg = PEEK32(CRT_DISPLAY_CTRL) in programModeRegisters()
155 ulReg = (PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) in programModeRegisters()
173 while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg)) in programModeRegisters()
Dddk750_power.h15 POKE32(MISC_CTRL,FIELD_VALUE(PEEK32(MISC_CTRL), \
Dsm750_cursor.c23 #define PEEK32(addr) \ macro