| /linux-4.1.27/arch/sh/boards/mach-hp6xx/ |
| D | pm.c | 31 #define MCR 0xffffff68 macro
66 mcr = __raw_readw(MCR); in pm_enter()
67 __raw_writew(mcr & ~MCR_RFSH, MCR); in pm_enter()
78 __raw_writew(mcr | MCR_RFSH | MCR_RMODE, MCR); in pm_enter()
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| /linux-4.1.27/drivers/atm/ |
| D | idt77105.c | 134 PUT( walk->old_mcr ,MCR); in idt77105_restart_timer_func()
230 PRIV(dev)->old_mcr = GET(MCR); in idt77105_int()
236 ) & ~IDT77105_MCR_EIP, MCR); in idt77105_int()
295 PRIV(dev)->old_mcr = GET(MCR); in idt77105_start()
298 PUT(PRIV(dev)->old_mcr, MCR); in idt77105_start()
331 PUT( GET(MCR) & ~IDT77105_MCR_EIP, MCR ); in idt77105_stop()
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| D | iphase.h | 173 #define MCR 0 macro
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| /linux-4.1.27/drivers/tty/ |
| D | amiserial.c | 108 int MCR; /* Modem control register */ member
565 info->MCR = 0; in startup()
567 info->MCR = SER_DTR | SER_RTS; in startup()
568 rtsdtr_ctrl(info->MCR); in startup()
644 info->MCR &= ~(SER_DTR|SER_RTS); in shutdown()
645 rtsdtr_ctrl(info->MCR); in shutdown()
982 info->MCR &= ~SER_RTS; in rs_throttle()
985 rtsdtr_ctrl(info->MCR); in rs_throttle()
1010 info->MCR |= SER_RTS; in rs_unthrottle()
1012 rtsdtr_ctrl(info->MCR); in rs_unthrottle()
[all …]
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| D | mxser.c | 240 int MCR; /* Modem control register */ member
600 info->MCR |= UART_MCR_DTR; in mxser_set_baud()
601 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_set_baud()
603 info->MCR &= ~UART_MCR_DTR; in mxser_set_baud()
604 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_set_baud()
712 info->MCR &= ~UART_MCR_AFE; in mxser_change_speed()
717 info->MCR |= UART_MCR_AFE; in mxser_change_speed()
749 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_change_speed()
920 info->MCR = UART_MCR_DTR | UART_MCR_RTS; in mxser_activate()
921 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_activate()
[all …]
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| /linux-4.1.27/drivers/net/hamradio/ |
| D | baycom_ser_fdx.c | 112 #define MCR(iobase) (iobase+4) macro
329 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr)); in ser12_interrupt()
331 outb(0x0d, MCR(dev->base_addr)); /* transmitter off */ in ser12_interrupt()
387 b1 = inb(MCR(iobase)); in ser12_check_uart()
388 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in ser12_check_uart()
390 outb(0x1a, MCR(iobase)); in ser12_check_uart()
392 outb(b1, MCR(iobase)); /* restore old values */ in ser12_check_uart()
446 outb(0x0d, MCR(dev->base_addr)); in ser12_open()
489 outb(1, MCR(dev->base_addr)); in ser12_close()
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| D | baycom_ser_hdx.c | 100 #define MCR(iobase) (iobase+4) macro
209 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr)); in ser12_tx()
355 outb(0x0d, MCR(dev->base_addr)); /* transmitter off */ in ser12_rx()
446 b1 = inb(MCR(iobase)); in ser12_check_uart()
447 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in ser12_check_uart()
449 outb(0x1a, MCR(iobase)); in ser12_check_uart()
451 outb(b1, MCR(iobase)); /* restore old values */ in ser12_check_uart()
491 outb(0x0d, MCR(dev->base_addr)); in ser12_open()
525 outb(1, MCR(dev->base_addr)); in ser12_close()
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| D | yam.c | 170 #define MCR(iobase) (iobase+4) macro
317 outb(MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_reset()
320 outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_reset()
336 outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_write()
485 outb(PTT_OFF, MCR(dev->base_addr)); in yam_set_uart()
516 b1 = inb(MCR(iobase)); in yam_check_uart()
517 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in yam_check_uart()
519 outb(0x1a, MCR(iobase)); in yam_check_uart()
521 outb(b1, MCR(iobase)); /* restore old values */ in yam_check_uart()
587 outb(PTT_ON, MCR(dev->base_addr)); in ptt_on()
[all …]
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| /linux-4.1.27/arch/x86/boot/ |
| D | early_serial_console.c | 13 #define MCR 4 /* Modem control */ macro
29 outb(0x3, port + MCR); /* DTR + RTS */ in early_serial_init()
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| /linux-4.1.27/arch/frv/kernel/ |
| D | gdb-io.c | 41 #define FLOWCTL_CLEAR(LINE) do { __UART(MCR) &= ~UART_MCR_##LINE; mb(); } while (0)
42 #define FLOWCTL_SET(LINE) do { __UART(MCR) |= UART_MCR_##LINE; mb(); } while (0)
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| D | debug-stub.c | 34 #define FLOWCTL_CLEAR0(LINE) do { __UART0(MCR) &= ~UART_MCR_##LINE; } while (0)
35 #define FLOWCTL_SET0(LINE) do { __UART0(MCR) |= UART_MCR_##LINE; } while (0)
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| /linux-4.1.27/drivers/net/irda/ |
| D | nsc-ircc.c | 1014 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/ in nsc_ircc_setup()
1148 outb(0x62, iobase+MCR); in nsc_ircc_init_dongle_interface()
1238 outb(0x62, iobase+MCR); in nsc_ircc_change_dongle_speed()
1314 outb(mcr | MCR_TX_DFR, iobase+MCR); in nsc_ircc_change_speed()
1578 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_xmit()
1594 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR); in nsc_ircc_dma_xmit()
1659 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_xmit_complete()
1725 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_receive()
1746 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_receive()
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| D | nsc-ircc.h | 119 #define MCR 0x04 /* Mode Control Register */ macro
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| /linux-4.1.27/drivers/isdn/hisax/ |
| D | elsa_ser.c | 174 cs->hw.elsa.MCR = 0; in mstartup()
175 cs->hw.elsa.MCR = UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2; in mstartup()
176 serial_outp(cs, UART_MCR, cs->hw.elsa.MCR); in mstartup()
222 cs->hw.elsa.MCR &= ~UART_MCR_OUT2; in mshutdown()
227 cs->hw.elsa.MCR &= ~(UART_MCR_DTR | UART_MCR_RTS); in mshutdown()
228 serial_outp(cs, UART_MCR, cs->hw.elsa.MCR); in mshutdown()
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| D | hisax.h | 577 u_char MCR; member
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| /linux-4.1.27/drivers/dma/ |
| D | txx9dmac.h | 99 TXX9_DMA_REG32(MCR); /* Master Control Register */
105 u32 MCR; member
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| D | txx9dmac.c | 658 mcr = dma_readl(ddev, MCR); in txx9dmac_tasklet()
683 dma_readl(ddev, MCR)); in txx9dmac_interrupt()
1085 dma_writel(ddev, MCR, 0); in txx9dmac_off()
1220 dma_writel(ddev, MCR, mcr); in txx9dmac_probe()
1262 dma_writel(ddev, MCR, mcr); in txx9dmac_resume_noirq()
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| /linux-4.1.27/drivers/usb/serial/ |
| D | mos7720.c | 130 MCR, enumerator
1062 write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR); in mos7720_open()
1147 write_mos_reg(serial, port->port_number, MCR, 0x00); in mos7720_close()
1300 write_mos_reg(port->serial, port->port_number, MCR, in mos7720_throttle()
1330 write_mos_reg(port->serial, port->port_number, MCR, in mos7720_unthrottle()
1359 write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR); in set_higher_rates()
1373 write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR); in set_higher_rates()
1610 write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR); in change_port_settings()
1629 write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR); in change_port_settings()
1785 write_mos_reg(port->serial, port->port_number, MCR, in mos7720_tiocmset()
[all …]
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| D | io_16654.h | 39 #define MCR 4 // Modem Control Register macro
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| D | io_edgeport.c | 1405 status = send_cmd_write_uart_register(edge_port, MCR, in edge_throttle()
1442 send_cmd_write_uart_register(edge_port, MCR, in edge_unthrottle()
1529 send_cmd_write_uart_register(edge_port, MCR, edge_port->shadowMCR); in edge_tiocmset()
2336 (regNum == MCR) ? "MCR" : "LCR", __func__, regValue); in send_cmd_write_uart_register()
2340 regNum == MCR) { in send_cmd_write_uart_register()
2523 status = send_cmd_write_uart_register(edge_port, MCR, in change_port_settings()
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| /linux-4.1.27/arch/arm/mach-orion5x/ |
| D | tsx09-common.c | 42 writel(0x00, UART1_REG(MCR)); in qnap_tsx09_power_off()
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| D | terastation_pro2-setup.c | 285 writel(0x00, UART1_REG(MCR)); in tsp2_power_off()
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| D | kurobox_pro-setup.c | 306 writel(0x00, UART1_REG(MCR)); in kurobox_pro_power_off()
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| /linux-4.1.27/arch/x86/kernel/ |
| D | early_printk.c | 92 #define MCR 4 /* Modem control */ macro
138 serial_out(early_serial_base, MCR, 0x3); /* DTR + RTS */ in early_serial_hw_init()
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| /linux-4.1.27/arch/m68k/68360/ |
| D | head-rom.S | 55 #define MCR (_dprbase + REGB + 0x0000) macro
137 move.l #MCU_SIM_MCR, MCR
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| D | head-ram.S | 43 #define MCR (_dprbase + REGB + 0x0000) macro
125 move.l #MCU_SIM_MCR, MCR
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| /linux-4.1.27/drivers/net/ethernet/smsc/ |
| D | smc9194.h | 93 #define MCR 10 macro
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| D | smc9194.c | 936 memory_cfg_register = inw( ioaddr + MCR ); in smc_probe()
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| /linux-4.1.27/drivers/power/reset/ |
| D | qnap-poweroff.c | 71 writel(0x00, UART1_REG(MCR)); in qnap_power_off()
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| /linux-4.1.27/arch/arm/include/asm/ |
| D | vfpmacros.h | 16 MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd in toolkits()
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| /linux-4.1.27/arch/arm/mach-shmobile/include/mach/ |
| D | head-kzm9g.txt | 410 MCR p15, 0, r0, c1, c0, 0
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| /linux-4.1.27/arch/blackfin/kernel/ |
| D | debug-mmrs.c | 551 __UART(MCR, mcr); in bfin_debug_mmrs_uart()
567 __UART(MCR, mcr); in bfin_debug_mmrs_uart()
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| /linux-4.1.27/arch/x86/ |
| D | Kconfig | 557 Select this option to expose the IOSF sideband access registers (MCR,
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