Searched refs:IS_BROADWELL (Results 1 – 14 of 14) sorted by relevance
479 WARN_ON(!IS_HASWELL(dev) && !IS_BROADWELL(dev)); in intel_detect_pch()484 WARN_ON(!IS_HASWELL(dev) && !IS_BROADWELL(dev)); in intel_detect_pch()786 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in i915_drm_resume_early()1467 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_runtime_resume()1499 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in intel_suspend_complete()
559 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ivb_update_plane()564 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ivb_update_plane()590 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) { in ivb_update_plane()616 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ivb_update_plane()810 if (IS_BROADWELL(dev)) in intel_post_enable_primary()
254 (IS_BROADWELL(dev) ? 0 : link_entry_time) | in hsw_psr_enable_source()359 (IS_BROADWELL(dev) && intel_dig_port->port != PORT_A)) in intel_psr_enable()
2308 #define IS_BROADWELL(dev) (!INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev)) macro2313 #define IS_BDW_ULT(dev) (IS_BROADWELL(dev) && \2317 #define IS_BDW_GT3(dev) (IS_BROADWELL(dev) && \2359 #define HAS_WT(dev) ((IS_HASWELL(dev) || IS_BROADWELL(dev)) && \2397 #define HAS_IPS(dev) (IS_HSW_ULT(dev) || IS_BROADWELL(dev))2401 #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \2405 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev))
1878 } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in intel_read_wm_latency()1928 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ilk_wm_max_level()2123 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in intel_compute_pipe_wm()2255 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ilk_wm_lp_latency()2479 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in ilk_write_wm_values()3574 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ilk_pipe_wm_get_hw_state()3627 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ilk_wm_get_hw_state()3970 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in gen6_set_rps()4232 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in gen6_init_rps_frequencies()4251 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in gen6_init_rps_frequencies()[all …]
197 if (IS_BROADWELL(dev)) in hsw_power_well_post_enable()1340 } else if (IS_BROADWELL(dev_priv->dev)) { in intel_power_domains_init()
764 if (IS_BROADWELL(dev) && intel_dp->aux_ch_ctl_reg == DPA_AUX_CH_CTL) in i9xx_get_aux_send_ctl()1044 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) in intel_dp_aux_init()1159 if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) || in intel_dp_source_supports_hbr2()1477 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in intel_dp_compute_config()2919 } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in intel_dp_pre_emphasis_max()3418 if (IS_HASWELL(dev) || IS_BROADWELL(dev) || INTEL_INFO(dev)->gen >= 9) { in intel_dp_set_signal_levels()5469 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in intel_dp_init_connector()5556 if (IS_HASWELL(dev) || IS_BROADWELL(dev) || INTEL_INFO(dev)->gen >= 9) { in intel_dp_init_connector()
337 if ((IS_HASWELL(dev) || IS_BROADWELL(dev) || in intel_uncore_ellc_detect()1074 } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in intel_uncore_fw_domains_init()
324 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in gt_act_freq_mhz_show()
1093 IS_BROADWELL(dev) || IS_GEN9(dev)) { in i915_frequency_info()1116 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in i915_frequency_info()1136 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in i915_frequency_info()2381 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) { in i915_pc8_status()2729 if (IS_BROADWELL(dev)) { in i915_semaphore_status()4483 if ((INTEL_INFO(dev)->gen < 8) || IS_BROADWELL(dev)) in i915_sseu_status()
2228 if (IS_BROADWELL(dev)) in intel_enable_primary_hw_plane()2825 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ironlake_update_primary_plane()2858 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) in ironlake_update_primary_plane()2870 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) { in ironlake_update_primary_plane()2887 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in ironlake_update_primary_plane()4348 if (IS_BROADWELL(dev)) { in hsw_enable_ips()4378 if (IS_BROADWELL(dev)) { in hsw_disable_ips()5719 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in ironlake_check_fdi_lanes()7649 if (IS_BROADWELL(dev) || INTEL_INFO(dev)->gen >= 9) { in haswell_set_pipeconf()8138 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in ironlake_get_initial_plane_config()[all …]
227 } else if (IS_BROADWELL(dev)) { in intel_prepare_ddi_buffers()1784 if (IS_BROADWELL(dev)) in intel_ddi_get_cdclk_freq()
1361 if (IS_BROADWELL(dev) || (INTEL_INFO(dev)->gen >= 9)) { in intel_panel_init_backlight_funcs()
1041 if (IS_BROADWELL(dev)) in init_workarounds_ring()