Searched refs:IOMUXC_GPR1 (Results 1 - 7 of 7) sorted by relevance
| /linux-4.1.27/arch/arm/mach-imx/ |
| H A D | mach-imx6sl.c | 29 regmap_update_bits(gpr, IOMUXC_GPR1, imx6sl_fec_init()
31 regmap_update_bits(gpr, IOMUXC_GPR1, imx6sl_fec_init()
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| H A D | mach-imx6sx.c | 52 regmap_update_bits(gpr, IOMUXC_GPR1, imx6sx_enet_clk_sel()
54 regmap_update_bits(gpr, IOMUXC_GPR1, imx6sx_enet_clk_sel()
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| H A D | mach-imx6q.c | 211 * set bit IOMUXC_GPR1[21]. Or the PTP clock must be from pad imx6q_1588_init()
219 regmap_update_bits(gpr, IOMUXC_GPR1, imx6q_1588_init()
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| H A D | pm-imx6.c | 578 regmap_update_bits(gpr, IOMUXC_GPR1, IMX6Q_GPR1_GINT, imx6_pm_common_init()
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| /linux-4.1.27/drivers/bus/ |
| H A D | imx-weim.c | 100 /* Found it. Set up IOMUXC_GPR1[11:0] with it. */ imx_weim_gpr_setup()
101 regmap_update_bits(gpr, IOMUXC_GPR1, 0xfff, gprval); imx_weim_gpr_setup()
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| /linux-4.1.27/drivers/pci/host/ |
| H A D | pci-imx6.c | 233 regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, &gpr1); imx6_pcie_assert_core_reset()
247 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, imx6_pcie_assert_core_reset()
249 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, imx6_pcie_assert_core_reset()
279 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, imx6_pcie_deassert_core_reset()
288 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, imx6_pcie_deassert_core_reset()
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| /linux-4.1.27/include/linux/mfd/syscon/ |
| H A D | imx6q-iomuxc-gpr.h | 15 #define IOMUXC_GPR1 0x04 macro
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