Searched refs:INTE (Results 1 - 13 of 13) sorted by relevance

/linux-4.1.27/arch/arm/mach-ixp4xx/
H A Ddsmg600-pci.c33 #define INTE 7 macro
42 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); dsmg600_pci_preinit()
50 { IXP4XX_GPIO_IRQ(INTE), -1, -1 }, dsmg600_map_irq()
H A Dnas100d-pci.c32 #define INTE 7 macro
40 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); nas100d_pci_preinit()
50 IXP4XX_GPIO_IRQ(INTE) }, nas100d_map_irq()
/linux-4.1.27/drivers/staging/comedi/drivers/
H A Ddas16m1.c99 #define INTE 0x80 macro
257 devpriv->control_state &= ~INTE & ~PACER_MASK; das16m1_cmd_exec()
307 devpriv->control_state |= INTE; das16m1_cmd_exec()
317 devpriv->control_state &= ~INTE & ~PACER_MASK; das16m1_cancel()
346 devpriv->control_state &= ~INTE & ~PACER_MASK; das16m1_ai_rinsn()
H A Dcb_pcidas.c87 #define INTE 0x4 /* int enable */ macro
922 devpriv->adc_fifo_bits |= INTE; cb_pcidas_ai_cmd()
1063 devpriv->adc_fifo_bits &= ~INTE & ~EOAIE; cb_pcidas_cancel()
/linux-4.1.27/sound/pci/emu10k1/
H A Dio.c308 enable = inl(emu->port + INTE) | intrenb; snd_emu10k1_intr_enable()
309 outl(enable, emu->port + INTE); snd_emu10k1_intr_enable()
319 enable = inl(emu->port + INTE) & ~intrenb; snd_emu10k1_intr_disable()
320 outl(enable, emu->port + INTE); snd_emu10k1_intr_disable()
H A Demu10k1x.c84 #define INTE 0x0c /* Interrupt enable register */ macro
333 intr_enable = inl(emu->port + INTE) | intrenb; snd_emu10k1x_intr_enable()
334 outl(intr_enable, emu->port + INTE); snd_emu10k1x_intr_enable()
344 intr_enable = inl(emu->port + INTE) & ~intrenb; snd_emu10k1x_intr_disable()
345 outl(intr_enable, emu->port + INTE); snd_emu10k1x_intr_disable()
758 outl(0, chip->port + INTE); snd_emu10k1x_free()
967 outl(0, chip->port + INTE); snd_emu10k1x_create()
H A Demu10k1_main.c177 outl(0, emu->port + INTE); snd_emu10k1_init()
413 outl(0, emu->port + INTE); snd_emu10k1_done()
/linux-4.1.27/sound/pci/ca0106/
H A Dca0106_main.c473 intr_enable = inl(emu->port + INTE) | intrenb; snd_ca0106_intr_enable()
474 outl(intr_enable, emu->port + INTE); snd_ca0106_intr_enable()
484 intr_enable = inl(emu->port + INTE) & ~intrenb; snd_ca0106_intr_disable()
485 outl(intr_enable, emu->port + INTE); snd_ca0106_intr_disable()
1474 outl(0, chip->port + INTE); ca0106_init_chip()
1651 outl(0, chip->port + INTE); ca0106_stop_chip()
H A Dca0106.h106 #define INTE 0x0c /* Interrupt enable register */ macro
/linux-4.1.27/arch/mips/include/asm/
H A Dnile4.h193 #define NILE4_INT_INTE 12 /* PCI Interrupt Signal INTE# (ISA cascade) */
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb/
H A Dpm3393.c119 * 2. Enable PM3393 Master Interrupt bit(INTE)
/linux-4.1.27/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dev.c1144 * set control bits OWN and INTE xgbe_rx_desc_reset()
1151 XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, INTE, inte); xgbe_rx_desc_reset()
/linux-4.1.27/include/sound/
H A Demu10k1.h85 which INTE bits enable it) */
119 #define INTE 0x0c /* Interrupt enable register */ macro

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