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Searched refs:CP_ME1_PIPE0_INT_CNTL (Results 1 – 3 of 3) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/amd/amdkfd/
Dcik_regs.h79 #define CP_ME1_PIPE0_INT_CNTL 0xC214 macro
/linux-4.1.27/drivers/gpu/drm/radeon/
Dcikd.h1359 #define CP_ME1_PIPE0_INT_CNTL 0xC214 macro
Dcik.c7292 WREG32(CP_ME1_PIPE0_INT_CNTL, 0); in cik_disable_interrupt_state()
7474 cp_m1p0 = RREG32(CP_ME1_PIPE0_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; in cik_irq_set()
7584 WREG32(CP_ME1_PIPE0_INT_CNTL, cp_m1p0); in cik_irq_set()