Searched refs:CLK_RESET_SOURCE_CSITE (Results 1 - 1 of 1) sorted by relevance

/linux-4.1.27/drivers/clk/tegra/
H A Dclk-tegra30.c151 #define CLK_RESET_SOURCE_CSITE 0x1d4 macro
1271 readl(clk_base + CLK_RESET_SOURCE_CSITE); tegra30_cpu_clock_suspend()
1272 writel(3<<30, clk_base + CLK_RESET_SOURCE_CSITE); tegra30_cpu_clock_suspend()
1321 clk_base + CLK_RESET_SOURCE_CSITE); tegra30_cpu_clock_resume()

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