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Searched refs:APBC_RTC (Results 1 – 9 of 9) sorted by relevance

/linux-4.1.27/arch/arm/mach-mmp/
Dclock-pxa910.c25 #define APBC_RTC APBC_REG(0x028) macro
Dclock-pxa168.c23 #define APBC_RTC APBC_REG(0x028) macro
Dclock-mmp2.c16 #define APBC_RTC APBC_REG(0x000) macro
/linux-4.1.27/drivers/clk/mmp/
Dclk-of-pxa168.c25 #define APBC_RTC 0x28 macro
140 …{PXA168_CLK_RTC, "rtc_clk", "clk32", CLK_SET_RATE_PARENT, APBC_RTC, 0x83, 0x83, 0x0, MMP_CLK_GATE_…
Dclk-of-pxa910.c25 #define APBC_RTC 0x28 macro
135 …{PXA910_CLK_RTC, "rtc_clk", "clk32", CLK_SET_RATE_PARENT, APBC_RTC, 0x83, 0x83, 0x0, MMP_CLK_GATE_…
Dclk-pxa910.c23 #define APBC_RTC 0x28 macro
187 apbc_base + APBC_RTC, 10, 0, &clk_lock); in pxa910_clk_init()
Dclk-of-mmp2.c25 #define APBC_RTC 0x0 macro
159 …{MMP2_CLK_RTC, "rtc_clk", "clk32", CLK_SET_RATE_PARENT, APBC_RTC, 0x87, 0x83, 0x0, MMP_CLK_GATE_NE…
Dclk-pxa168.c23 #define APBC_RTC 0x28 macro
182 apbc_base + APBC_RTC, 10, 0, &clk_lock); in pxa168_clk_init()
Dclk-mmp2.c23 #define APBC_RTC 0x0 macro
231 apbc_base + APBC_RTC, 10, 0, &clk_lock); in mmp2_clk_init()