1 /*******************************************************************************
2  *
3  * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
4  * Copyright(c) 2013 - 2014 Intel Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  * The full GNU General Public License is included in this distribution in
19  * the file called "COPYING".
20  *
21  * Contact Information:
22  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24  *
25  ******************************************************************************/
26 
27 #include "i40e_type.h"
28 #include "i40e_adminq.h"
29 #include "i40e_prototype.h"
30 #include "i40e_virtchnl.h"
31 
32 /**
33  * i40e_set_mac_type - Sets MAC type
34  * @hw: pointer to the HW structure
35  *
36  * This function sets the mac type of the adapter based on the
37  * vendor ID and device ID stored in the hw structure.
38  **/
i40e_set_mac_type(struct i40e_hw * hw)39 i40e_status i40e_set_mac_type(struct i40e_hw *hw)
40 {
41 	i40e_status status = 0;
42 
43 	if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
44 		switch (hw->device_id) {
45 		case I40E_DEV_ID_SFP_XL710:
46 		case I40E_DEV_ID_QEMU:
47 		case I40E_DEV_ID_KX_A:
48 		case I40E_DEV_ID_KX_B:
49 		case I40E_DEV_ID_KX_C:
50 		case I40E_DEV_ID_QSFP_A:
51 		case I40E_DEV_ID_QSFP_B:
52 		case I40E_DEV_ID_QSFP_C:
53 		case I40E_DEV_ID_10G_BASE_T:
54 		case I40E_DEV_ID_10G_BASE_T4:
55 		case I40E_DEV_ID_20G_KR2:
56 		case I40E_DEV_ID_20G_KR2_A:
57 			hw->mac.type = I40E_MAC_XL710;
58 			break;
59 		case I40E_DEV_ID_SFP_X722:
60 		case I40E_DEV_ID_1G_BASE_T_X722:
61 		case I40E_DEV_ID_10G_BASE_T_X722:
62 			hw->mac.type = I40E_MAC_X722;
63 			break;
64 		case I40E_DEV_ID_X722_VF:
65 		case I40E_DEV_ID_X722_VF_HV:
66 			hw->mac.type = I40E_MAC_X722_VF;
67 			break;
68 		case I40E_DEV_ID_VF:
69 		case I40E_DEV_ID_VF_HV:
70 			hw->mac.type = I40E_MAC_VF;
71 			break;
72 		default:
73 			hw->mac.type = I40E_MAC_GENERIC;
74 			break;
75 		}
76 	} else {
77 		status = I40E_ERR_DEVICE_NOT_SUPPORTED;
78 	}
79 
80 	hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
81 		  hw->mac.type, status);
82 	return status;
83 }
84 
85 /**
86  * i40evf_aq_str - convert AQ err code to a string
87  * @hw: pointer to the HW structure
88  * @aq_err: the AQ error code to convert
89  **/
i40evf_aq_str(struct i40e_hw * hw,enum i40e_admin_queue_err aq_err)90 const char *i40evf_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
91 {
92 	switch (aq_err) {
93 	case I40E_AQ_RC_OK:
94 		return "OK";
95 	case I40E_AQ_RC_EPERM:
96 		return "I40E_AQ_RC_EPERM";
97 	case I40E_AQ_RC_ENOENT:
98 		return "I40E_AQ_RC_ENOENT";
99 	case I40E_AQ_RC_ESRCH:
100 		return "I40E_AQ_RC_ESRCH";
101 	case I40E_AQ_RC_EINTR:
102 		return "I40E_AQ_RC_EINTR";
103 	case I40E_AQ_RC_EIO:
104 		return "I40E_AQ_RC_EIO";
105 	case I40E_AQ_RC_ENXIO:
106 		return "I40E_AQ_RC_ENXIO";
107 	case I40E_AQ_RC_E2BIG:
108 		return "I40E_AQ_RC_E2BIG";
109 	case I40E_AQ_RC_EAGAIN:
110 		return "I40E_AQ_RC_EAGAIN";
111 	case I40E_AQ_RC_ENOMEM:
112 		return "I40E_AQ_RC_ENOMEM";
113 	case I40E_AQ_RC_EACCES:
114 		return "I40E_AQ_RC_EACCES";
115 	case I40E_AQ_RC_EFAULT:
116 		return "I40E_AQ_RC_EFAULT";
117 	case I40E_AQ_RC_EBUSY:
118 		return "I40E_AQ_RC_EBUSY";
119 	case I40E_AQ_RC_EEXIST:
120 		return "I40E_AQ_RC_EEXIST";
121 	case I40E_AQ_RC_EINVAL:
122 		return "I40E_AQ_RC_EINVAL";
123 	case I40E_AQ_RC_ENOTTY:
124 		return "I40E_AQ_RC_ENOTTY";
125 	case I40E_AQ_RC_ENOSPC:
126 		return "I40E_AQ_RC_ENOSPC";
127 	case I40E_AQ_RC_ENOSYS:
128 		return "I40E_AQ_RC_ENOSYS";
129 	case I40E_AQ_RC_ERANGE:
130 		return "I40E_AQ_RC_ERANGE";
131 	case I40E_AQ_RC_EFLUSHED:
132 		return "I40E_AQ_RC_EFLUSHED";
133 	case I40E_AQ_RC_BAD_ADDR:
134 		return "I40E_AQ_RC_BAD_ADDR";
135 	case I40E_AQ_RC_EMODE:
136 		return "I40E_AQ_RC_EMODE";
137 	case I40E_AQ_RC_EFBIG:
138 		return "I40E_AQ_RC_EFBIG";
139 	}
140 
141 	snprintf(hw->err_str, sizeof(hw->err_str), "%d", aq_err);
142 	return hw->err_str;
143 }
144 
145 /**
146  * i40evf_stat_str - convert status err code to a string
147  * @hw: pointer to the HW structure
148  * @stat_err: the status error code to convert
149  **/
i40evf_stat_str(struct i40e_hw * hw,i40e_status stat_err)150 const char *i40evf_stat_str(struct i40e_hw *hw, i40e_status stat_err)
151 {
152 	switch (stat_err) {
153 	case 0:
154 		return "OK";
155 	case I40E_ERR_NVM:
156 		return "I40E_ERR_NVM";
157 	case I40E_ERR_NVM_CHECKSUM:
158 		return "I40E_ERR_NVM_CHECKSUM";
159 	case I40E_ERR_PHY:
160 		return "I40E_ERR_PHY";
161 	case I40E_ERR_CONFIG:
162 		return "I40E_ERR_CONFIG";
163 	case I40E_ERR_PARAM:
164 		return "I40E_ERR_PARAM";
165 	case I40E_ERR_MAC_TYPE:
166 		return "I40E_ERR_MAC_TYPE";
167 	case I40E_ERR_UNKNOWN_PHY:
168 		return "I40E_ERR_UNKNOWN_PHY";
169 	case I40E_ERR_LINK_SETUP:
170 		return "I40E_ERR_LINK_SETUP";
171 	case I40E_ERR_ADAPTER_STOPPED:
172 		return "I40E_ERR_ADAPTER_STOPPED";
173 	case I40E_ERR_INVALID_MAC_ADDR:
174 		return "I40E_ERR_INVALID_MAC_ADDR";
175 	case I40E_ERR_DEVICE_NOT_SUPPORTED:
176 		return "I40E_ERR_DEVICE_NOT_SUPPORTED";
177 	case I40E_ERR_MASTER_REQUESTS_PENDING:
178 		return "I40E_ERR_MASTER_REQUESTS_PENDING";
179 	case I40E_ERR_INVALID_LINK_SETTINGS:
180 		return "I40E_ERR_INVALID_LINK_SETTINGS";
181 	case I40E_ERR_AUTONEG_NOT_COMPLETE:
182 		return "I40E_ERR_AUTONEG_NOT_COMPLETE";
183 	case I40E_ERR_RESET_FAILED:
184 		return "I40E_ERR_RESET_FAILED";
185 	case I40E_ERR_SWFW_SYNC:
186 		return "I40E_ERR_SWFW_SYNC";
187 	case I40E_ERR_NO_AVAILABLE_VSI:
188 		return "I40E_ERR_NO_AVAILABLE_VSI";
189 	case I40E_ERR_NO_MEMORY:
190 		return "I40E_ERR_NO_MEMORY";
191 	case I40E_ERR_BAD_PTR:
192 		return "I40E_ERR_BAD_PTR";
193 	case I40E_ERR_RING_FULL:
194 		return "I40E_ERR_RING_FULL";
195 	case I40E_ERR_INVALID_PD_ID:
196 		return "I40E_ERR_INVALID_PD_ID";
197 	case I40E_ERR_INVALID_QP_ID:
198 		return "I40E_ERR_INVALID_QP_ID";
199 	case I40E_ERR_INVALID_CQ_ID:
200 		return "I40E_ERR_INVALID_CQ_ID";
201 	case I40E_ERR_INVALID_CEQ_ID:
202 		return "I40E_ERR_INVALID_CEQ_ID";
203 	case I40E_ERR_INVALID_AEQ_ID:
204 		return "I40E_ERR_INVALID_AEQ_ID";
205 	case I40E_ERR_INVALID_SIZE:
206 		return "I40E_ERR_INVALID_SIZE";
207 	case I40E_ERR_INVALID_ARP_INDEX:
208 		return "I40E_ERR_INVALID_ARP_INDEX";
209 	case I40E_ERR_INVALID_FPM_FUNC_ID:
210 		return "I40E_ERR_INVALID_FPM_FUNC_ID";
211 	case I40E_ERR_QP_INVALID_MSG_SIZE:
212 		return "I40E_ERR_QP_INVALID_MSG_SIZE";
213 	case I40E_ERR_QP_TOOMANY_WRS_POSTED:
214 		return "I40E_ERR_QP_TOOMANY_WRS_POSTED";
215 	case I40E_ERR_INVALID_FRAG_COUNT:
216 		return "I40E_ERR_INVALID_FRAG_COUNT";
217 	case I40E_ERR_QUEUE_EMPTY:
218 		return "I40E_ERR_QUEUE_EMPTY";
219 	case I40E_ERR_INVALID_ALIGNMENT:
220 		return "I40E_ERR_INVALID_ALIGNMENT";
221 	case I40E_ERR_FLUSHED_QUEUE:
222 		return "I40E_ERR_FLUSHED_QUEUE";
223 	case I40E_ERR_INVALID_PUSH_PAGE_INDEX:
224 		return "I40E_ERR_INVALID_PUSH_PAGE_INDEX";
225 	case I40E_ERR_INVALID_IMM_DATA_SIZE:
226 		return "I40E_ERR_INVALID_IMM_DATA_SIZE";
227 	case I40E_ERR_TIMEOUT:
228 		return "I40E_ERR_TIMEOUT";
229 	case I40E_ERR_OPCODE_MISMATCH:
230 		return "I40E_ERR_OPCODE_MISMATCH";
231 	case I40E_ERR_CQP_COMPL_ERROR:
232 		return "I40E_ERR_CQP_COMPL_ERROR";
233 	case I40E_ERR_INVALID_VF_ID:
234 		return "I40E_ERR_INVALID_VF_ID";
235 	case I40E_ERR_INVALID_HMCFN_ID:
236 		return "I40E_ERR_INVALID_HMCFN_ID";
237 	case I40E_ERR_BACKING_PAGE_ERROR:
238 		return "I40E_ERR_BACKING_PAGE_ERROR";
239 	case I40E_ERR_NO_PBLCHUNKS_AVAILABLE:
240 		return "I40E_ERR_NO_PBLCHUNKS_AVAILABLE";
241 	case I40E_ERR_INVALID_PBLE_INDEX:
242 		return "I40E_ERR_INVALID_PBLE_INDEX";
243 	case I40E_ERR_INVALID_SD_INDEX:
244 		return "I40E_ERR_INVALID_SD_INDEX";
245 	case I40E_ERR_INVALID_PAGE_DESC_INDEX:
246 		return "I40E_ERR_INVALID_PAGE_DESC_INDEX";
247 	case I40E_ERR_INVALID_SD_TYPE:
248 		return "I40E_ERR_INVALID_SD_TYPE";
249 	case I40E_ERR_MEMCPY_FAILED:
250 		return "I40E_ERR_MEMCPY_FAILED";
251 	case I40E_ERR_INVALID_HMC_OBJ_INDEX:
252 		return "I40E_ERR_INVALID_HMC_OBJ_INDEX";
253 	case I40E_ERR_INVALID_HMC_OBJ_COUNT:
254 		return "I40E_ERR_INVALID_HMC_OBJ_COUNT";
255 	case I40E_ERR_INVALID_SRQ_ARM_LIMIT:
256 		return "I40E_ERR_INVALID_SRQ_ARM_LIMIT";
257 	case I40E_ERR_SRQ_ENABLED:
258 		return "I40E_ERR_SRQ_ENABLED";
259 	case I40E_ERR_ADMIN_QUEUE_ERROR:
260 		return "I40E_ERR_ADMIN_QUEUE_ERROR";
261 	case I40E_ERR_ADMIN_QUEUE_TIMEOUT:
262 		return "I40E_ERR_ADMIN_QUEUE_TIMEOUT";
263 	case I40E_ERR_BUF_TOO_SHORT:
264 		return "I40E_ERR_BUF_TOO_SHORT";
265 	case I40E_ERR_ADMIN_QUEUE_FULL:
266 		return "I40E_ERR_ADMIN_QUEUE_FULL";
267 	case I40E_ERR_ADMIN_QUEUE_NO_WORK:
268 		return "I40E_ERR_ADMIN_QUEUE_NO_WORK";
269 	case I40E_ERR_BAD_IWARP_CQE:
270 		return "I40E_ERR_BAD_IWARP_CQE";
271 	case I40E_ERR_NVM_BLANK_MODE:
272 		return "I40E_ERR_NVM_BLANK_MODE";
273 	case I40E_ERR_NOT_IMPLEMENTED:
274 		return "I40E_ERR_NOT_IMPLEMENTED";
275 	case I40E_ERR_PE_DOORBELL_NOT_ENABLED:
276 		return "I40E_ERR_PE_DOORBELL_NOT_ENABLED";
277 	case I40E_ERR_DIAG_TEST_FAILED:
278 		return "I40E_ERR_DIAG_TEST_FAILED";
279 	case I40E_ERR_NOT_READY:
280 		return "I40E_ERR_NOT_READY";
281 	case I40E_NOT_SUPPORTED:
282 		return "I40E_NOT_SUPPORTED";
283 	case I40E_ERR_FIRMWARE_API_VERSION:
284 		return "I40E_ERR_FIRMWARE_API_VERSION";
285 	}
286 
287 	snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err);
288 	return hw->err_str;
289 }
290 
291 /**
292  * i40evf_debug_aq
293  * @hw: debug mask related to admin queue
294  * @mask: debug mask
295  * @desc: pointer to admin queue descriptor
296  * @buffer: pointer to command buffer
297  * @buf_len: max length of buffer
298  *
299  * Dumps debug log about adminq command with descriptor contents.
300  **/
i40evf_debug_aq(struct i40e_hw * hw,enum i40e_debug_mask mask,void * desc,void * buffer,u16 buf_len)301 void i40evf_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
302 		   void *buffer, u16 buf_len)
303 {
304 	struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
305 	u16 len = le16_to_cpu(aq_desc->datalen);
306 	u8 *buf = (u8 *)buffer;
307 	u16 i = 0;
308 
309 	if ((!(mask & hw->debug_mask)) || (desc == NULL))
310 		return;
311 
312 	i40e_debug(hw, mask,
313 		   "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
314 		   le16_to_cpu(aq_desc->opcode),
315 		   le16_to_cpu(aq_desc->flags),
316 		   le16_to_cpu(aq_desc->datalen),
317 		   le16_to_cpu(aq_desc->retval));
318 	i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
319 		   le32_to_cpu(aq_desc->cookie_high),
320 		   le32_to_cpu(aq_desc->cookie_low));
321 	i40e_debug(hw, mask, "\tparam (0,1)  0x%08X 0x%08X\n",
322 		   le32_to_cpu(aq_desc->params.internal.param0),
323 		   le32_to_cpu(aq_desc->params.internal.param1));
324 	i40e_debug(hw, mask, "\taddr (h,l)   0x%08X 0x%08X\n",
325 		   le32_to_cpu(aq_desc->params.external.addr_high),
326 		   le32_to_cpu(aq_desc->params.external.addr_low));
327 
328 	if ((buffer != NULL) && (aq_desc->datalen != 0)) {
329 		i40e_debug(hw, mask, "AQ CMD Buffer:\n");
330 		if (buf_len < len)
331 			len = buf_len;
332 		/* write the full 16-byte chunks */
333 		for (i = 0; i < (len - 16); i += 16)
334 			i40e_debug(hw, mask, "\t0x%04X  %16ph\n", i, buf + i);
335 		/* write whatever's left over without overrunning the buffer */
336 		if (i < len)
337 			i40e_debug(hw, mask, "\t0x%04X  %*ph\n",
338 					     i, len - i, buf + i);
339 	}
340 }
341 
342 /**
343  * i40evf_check_asq_alive
344  * @hw: pointer to the hw struct
345  *
346  * Returns true if Queue is enabled else false.
347  **/
i40evf_check_asq_alive(struct i40e_hw * hw)348 bool i40evf_check_asq_alive(struct i40e_hw *hw)
349 {
350 	if (hw->aq.asq.len)
351 		return !!(rd32(hw, hw->aq.asq.len) &
352 			  I40E_VF_ATQLEN1_ATQENABLE_MASK);
353 	else
354 		return false;
355 }
356 
357 /**
358  * i40evf_aq_queue_shutdown
359  * @hw: pointer to the hw struct
360  * @unloading: is the driver unloading itself
361  *
362  * Tell the Firmware that we're shutting down the AdminQ and whether
363  * or not the driver is unloading as well.
364  **/
i40evf_aq_queue_shutdown(struct i40e_hw * hw,bool unloading)365 i40e_status i40evf_aq_queue_shutdown(struct i40e_hw *hw,
366 					     bool unloading)
367 {
368 	struct i40e_aq_desc desc;
369 	struct i40e_aqc_queue_shutdown *cmd =
370 		(struct i40e_aqc_queue_shutdown *)&desc.params.raw;
371 	i40e_status status;
372 
373 	i40evf_fill_default_direct_cmd_desc(&desc,
374 					  i40e_aqc_opc_queue_shutdown);
375 
376 	if (unloading)
377 		cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
378 	status = i40evf_asq_send_command(hw, &desc, NULL, 0, NULL);
379 
380 	return status;
381 }
382 
383 /**
384  * i40e_aq_get_set_rss_lut
385  * @hw: pointer to the hardware structure
386  * @vsi_id: vsi fw index
387  * @pf_lut: for PF table set true, for VSI table set false
388  * @lut: pointer to the lut buffer provided by the caller
389  * @lut_size: size of the lut buffer
390  * @set: set true to set the table, false to get the table
391  *
392  * Internal function to get or set RSS look up table
393  **/
i40e_aq_get_set_rss_lut(struct i40e_hw * hw,u16 vsi_id,bool pf_lut,u8 * lut,u16 lut_size,bool set)394 static i40e_status i40e_aq_get_set_rss_lut(struct i40e_hw *hw,
395 					   u16 vsi_id, bool pf_lut,
396 					   u8 *lut, u16 lut_size,
397 					   bool set)
398 {
399 	i40e_status status;
400 	struct i40e_aq_desc desc;
401 	struct i40e_aqc_get_set_rss_lut *cmd_resp =
402 		   (struct i40e_aqc_get_set_rss_lut *)&desc.params.raw;
403 
404 	if (set)
405 		i40evf_fill_default_direct_cmd_desc(&desc,
406 						    i40e_aqc_opc_set_rss_lut);
407 	else
408 		i40evf_fill_default_direct_cmd_desc(&desc,
409 						    i40e_aqc_opc_get_rss_lut);
410 
411 	/* Indirect command */
412 	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
413 	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
414 
415 	cmd_resp->vsi_id =
416 			cpu_to_le16((u16)((vsi_id <<
417 					  I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT) &
418 					  I40E_AQC_SET_RSS_LUT_VSI_ID_MASK));
419 	cmd_resp->vsi_id |= cpu_to_le16((u16)I40E_AQC_SET_RSS_LUT_VSI_VALID);
420 
421 	if (pf_lut)
422 		cmd_resp->flags |= cpu_to_le16((u16)
423 					((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF <<
424 					I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
425 					I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
426 	else
427 		cmd_resp->flags |= cpu_to_le16((u16)
428 					((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI <<
429 					I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
430 					I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
431 
432 	status = i40evf_asq_send_command(hw, &desc, lut, lut_size, NULL);
433 
434 	return status;
435 }
436 
437 /**
438  * i40evf_aq_get_rss_lut
439  * @hw: pointer to the hardware structure
440  * @vsi_id: vsi fw index
441  * @pf_lut: for PF table set true, for VSI table set false
442  * @lut: pointer to the lut buffer provided by the caller
443  * @lut_size: size of the lut buffer
444  *
445  * get the RSS lookup table, PF or VSI type
446  **/
i40evf_aq_get_rss_lut(struct i40e_hw * hw,u16 vsi_id,bool pf_lut,u8 * lut,u16 lut_size)447 i40e_status i40evf_aq_get_rss_lut(struct i40e_hw *hw, u16 vsi_id,
448 				  bool pf_lut, u8 *lut, u16 lut_size)
449 {
450 	return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size,
451 				       false);
452 }
453 
454 /**
455  * i40evf_aq_set_rss_lut
456  * @hw: pointer to the hardware structure
457  * @vsi_id: vsi fw index
458  * @pf_lut: for PF table set true, for VSI table set false
459  * @lut: pointer to the lut buffer provided by the caller
460  * @lut_size: size of the lut buffer
461  *
462  * set the RSS lookup table, PF or VSI type
463  **/
i40evf_aq_set_rss_lut(struct i40e_hw * hw,u16 vsi_id,bool pf_lut,u8 * lut,u16 lut_size)464 i40e_status i40evf_aq_set_rss_lut(struct i40e_hw *hw, u16 vsi_id,
465 				  bool pf_lut, u8 *lut, u16 lut_size)
466 {
467 	return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, true);
468 }
469 
470 /**
471  * i40e_aq_get_set_rss_key
472  * @hw: pointer to the hw struct
473  * @vsi_id: vsi fw index
474  * @key: pointer to key info struct
475  * @set: set true to set the key, false to get the key
476  *
477  * get the RSS key per VSI
478  **/
i40e_aq_get_set_rss_key(struct i40e_hw * hw,u16 vsi_id,struct i40e_aqc_get_set_rss_key_data * key,bool set)479 static i40e_status i40e_aq_get_set_rss_key(struct i40e_hw *hw,
480 				      u16 vsi_id,
481 				      struct i40e_aqc_get_set_rss_key_data *key,
482 				      bool set)
483 {
484 	i40e_status status;
485 	struct i40e_aq_desc desc;
486 	struct i40e_aqc_get_set_rss_key *cmd_resp =
487 			(struct i40e_aqc_get_set_rss_key *)&desc.params.raw;
488 	u16 key_size = sizeof(struct i40e_aqc_get_set_rss_key_data);
489 
490 	if (set)
491 		i40evf_fill_default_direct_cmd_desc(&desc,
492 						    i40e_aqc_opc_set_rss_key);
493 	else
494 		i40evf_fill_default_direct_cmd_desc(&desc,
495 						    i40e_aqc_opc_get_rss_key);
496 
497 	/* Indirect command */
498 	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
499 	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
500 
501 	cmd_resp->vsi_id =
502 			cpu_to_le16((u16)((vsi_id <<
503 					  I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT) &
504 					  I40E_AQC_SET_RSS_KEY_VSI_ID_MASK));
505 	cmd_resp->vsi_id |= cpu_to_le16((u16)I40E_AQC_SET_RSS_KEY_VSI_VALID);
506 
507 	status = i40evf_asq_send_command(hw, &desc, key, key_size, NULL);
508 
509 	return status;
510 }
511 
512 /**
513  * i40evf_aq_get_rss_key
514  * @hw: pointer to the hw struct
515  * @vsi_id: vsi fw index
516  * @key: pointer to key info struct
517  *
518  **/
i40evf_aq_get_rss_key(struct i40e_hw * hw,u16 vsi_id,struct i40e_aqc_get_set_rss_key_data * key)519 i40e_status i40evf_aq_get_rss_key(struct i40e_hw *hw,
520 				  u16 vsi_id,
521 				  struct i40e_aqc_get_set_rss_key_data *key)
522 {
523 	return i40e_aq_get_set_rss_key(hw, vsi_id, key, false);
524 }
525 
526 /**
527  * i40evf_aq_set_rss_key
528  * @hw: pointer to the hw struct
529  * @vsi_id: vsi fw index
530  * @key: pointer to key info struct
531  *
532  * set the RSS key per VSI
533  **/
i40evf_aq_set_rss_key(struct i40e_hw * hw,u16 vsi_id,struct i40e_aqc_get_set_rss_key_data * key)534 i40e_status i40evf_aq_set_rss_key(struct i40e_hw *hw,
535 				  u16 vsi_id,
536 				  struct i40e_aqc_get_set_rss_key_data *key)
537 {
538 	return i40e_aq_get_set_rss_key(hw, vsi_id, key, true);
539 }
540 
541 
542 /* The i40evf_ptype_lookup table is used to convert from the 8-bit ptype in the
543  * hardware to a bit-field that can be used by SW to more easily determine the
544  * packet type.
545  *
546  * Macros are used to shorten the table lines and make this table human
547  * readable.
548  *
549  * We store the PTYPE in the top byte of the bit field - this is just so that
550  * we can check that the table doesn't have a row missing, as the index into
551  * the table should be the PTYPE.
552  *
553  * Typical work flow:
554  *
555  * IF NOT i40evf_ptype_lookup[ptype].known
556  * THEN
557  *      Packet is unknown
558  * ELSE IF i40evf_ptype_lookup[ptype].outer_ip == I40E_RX_PTYPE_OUTER_IP
559  *      Use the rest of the fields to look at the tunnels, inner protocols, etc
560  * ELSE
561  *      Use the enum i40e_rx_l2_ptype to decode the packet type
562  * ENDIF
563  */
564 
565 /* macro to make the table lines short */
566 #define I40E_PTT(PTYPE, OUTER_IP, OUTER_IP_VER, OUTER_FRAG, T, TE, TEF, I, PL)\
567 	{	PTYPE, \
568 		1, \
569 		I40E_RX_PTYPE_OUTER_##OUTER_IP, \
570 		I40E_RX_PTYPE_OUTER_##OUTER_IP_VER, \
571 		I40E_RX_PTYPE_##OUTER_FRAG, \
572 		I40E_RX_PTYPE_TUNNEL_##T, \
573 		I40E_RX_PTYPE_TUNNEL_END_##TE, \
574 		I40E_RX_PTYPE_##TEF, \
575 		I40E_RX_PTYPE_INNER_PROT_##I, \
576 		I40E_RX_PTYPE_PAYLOAD_LAYER_##PL }
577 
578 #define I40E_PTT_UNUSED_ENTRY(PTYPE) \
579 		{ PTYPE, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
580 
581 /* shorter macros makes the table fit but are terse */
582 #define I40E_RX_PTYPE_NOF		I40E_RX_PTYPE_NOT_FRAG
583 #define I40E_RX_PTYPE_FRG		I40E_RX_PTYPE_FRAG
584 #define I40E_RX_PTYPE_INNER_PROT_TS	I40E_RX_PTYPE_INNER_PROT_TIMESYNC
585 
586 /* Lookup table mapping the HW PTYPE to the bit field for decoding */
587 struct i40e_rx_ptype_decoded i40evf_ptype_lookup[] = {
588 	/* L2 Packet types */
589 	I40E_PTT_UNUSED_ENTRY(0),
590 	I40E_PTT(1,  L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
591 	I40E_PTT(2,  L2, NONE, NOF, NONE, NONE, NOF, TS,   PAY2),
592 	I40E_PTT(3,  L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
593 	I40E_PTT_UNUSED_ENTRY(4),
594 	I40E_PTT_UNUSED_ENTRY(5),
595 	I40E_PTT(6,  L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
596 	I40E_PTT(7,  L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
597 	I40E_PTT_UNUSED_ENTRY(8),
598 	I40E_PTT_UNUSED_ENTRY(9),
599 	I40E_PTT(10, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
600 	I40E_PTT(11, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE),
601 	I40E_PTT(12, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
602 	I40E_PTT(13, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
603 	I40E_PTT(14, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
604 	I40E_PTT(15, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
605 	I40E_PTT(16, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
606 	I40E_PTT(17, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
607 	I40E_PTT(18, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
608 	I40E_PTT(19, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
609 	I40E_PTT(20, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
610 	I40E_PTT(21, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
611 
612 	/* Non Tunneled IPv4 */
613 	I40E_PTT(22, IP, IPV4, FRG, NONE, NONE, NOF, NONE, PAY3),
614 	I40E_PTT(23, IP, IPV4, NOF, NONE, NONE, NOF, NONE, PAY3),
615 	I40E_PTT(24, IP, IPV4, NOF, NONE, NONE, NOF, UDP,  PAY4),
616 	I40E_PTT_UNUSED_ENTRY(25),
617 	I40E_PTT(26, IP, IPV4, NOF, NONE, NONE, NOF, TCP,  PAY4),
618 	I40E_PTT(27, IP, IPV4, NOF, NONE, NONE, NOF, SCTP, PAY4),
619 	I40E_PTT(28, IP, IPV4, NOF, NONE, NONE, NOF, ICMP, PAY4),
620 
621 	/* IPv4 --> IPv4 */
622 	I40E_PTT(29, IP, IPV4, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
623 	I40E_PTT(30, IP, IPV4, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
624 	I40E_PTT(31, IP, IPV4, NOF, IP_IP, IPV4, NOF, UDP,  PAY4),
625 	I40E_PTT_UNUSED_ENTRY(32),
626 	I40E_PTT(33, IP, IPV4, NOF, IP_IP, IPV4, NOF, TCP,  PAY4),
627 	I40E_PTT(34, IP, IPV4, NOF, IP_IP, IPV4, NOF, SCTP, PAY4),
628 	I40E_PTT(35, IP, IPV4, NOF, IP_IP, IPV4, NOF, ICMP, PAY4),
629 
630 	/* IPv4 --> IPv6 */
631 	I40E_PTT(36, IP, IPV4, NOF, IP_IP, IPV6, FRG, NONE, PAY3),
632 	I40E_PTT(37, IP, IPV4, NOF, IP_IP, IPV6, NOF, NONE, PAY3),
633 	I40E_PTT(38, IP, IPV4, NOF, IP_IP, IPV6, NOF, UDP,  PAY4),
634 	I40E_PTT_UNUSED_ENTRY(39),
635 	I40E_PTT(40, IP, IPV4, NOF, IP_IP, IPV6, NOF, TCP,  PAY4),
636 	I40E_PTT(41, IP, IPV4, NOF, IP_IP, IPV6, NOF, SCTP, PAY4),
637 	I40E_PTT(42, IP, IPV4, NOF, IP_IP, IPV6, NOF, ICMP, PAY4),
638 
639 	/* IPv4 --> GRE/NAT */
640 	I40E_PTT(43, IP, IPV4, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3),
641 
642 	/* IPv4 --> GRE/NAT --> IPv4 */
643 	I40E_PTT(44, IP, IPV4, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3),
644 	I40E_PTT(45, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3),
645 	I40E_PTT(46, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, UDP,  PAY4),
646 	I40E_PTT_UNUSED_ENTRY(47),
647 	I40E_PTT(48, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, TCP,  PAY4),
648 	I40E_PTT(49, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4),
649 	I40E_PTT(50, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4),
650 
651 	/* IPv4 --> GRE/NAT --> IPv6 */
652 	I40E_PTT(51, IP, IPV4, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3),
653 	I40E_PTT(52, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3),
654 	I40E_PTT(53, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, UDP,  PAY4),
655 	I40E_PTT_UNUSED_ENTRY(54),
656 	I40E_PTT(55, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, TCP,  PAY4),
657 	I40E_PTT(56, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4),
658 	I40E_PTT(57, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4),
659 
660 	/* IPv4 --> GRE/NAT --> MAC */
661 	I40E_PTT(58, IP, IPV4, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3),
662 
663 	/* IPv4 --> GRE/NAT --> MAC --> IPv4 */
664 	I40E_PTT(59, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3),
665 	I40E_PTT(60, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3),
666 	I40E_PTT(61, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP,  PAY4),
667 	I40E_PTT_UNUSED_ENTRY(62),
668 	I40E_PTT(63, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP,  PAY4),
669 	I40E_PTT(64, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4),
670 	I40E_PTT(65, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4),
671 
672 	/* IPv4 --> GRE/NAT -> MAC --> IPv6 */
673 	I40E_PTT(66, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3),
674 	I40E_PTT(67, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3),
675 	I40E_PTT(68, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP,  PAY4),
676 	I40E_PTT_UNUSED_ENTRY(69),
677 	I40E_PTT(70, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP,  PAY4),
678 	I40E_PTT(71, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4),
679 	I40E_PTT(72, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4),
680 
681 	/* IPv4 --> GRE/NAT --> MAC/VLAN */
682 	I40E_PTT(73, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3),
683 
684 	/* IPv4 ---> GRE/NAT -> MAC/VLAN --> IPv4 */
685 	I40E_PTT(74, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3),
686 	I40E_PTT(75, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3),
687 	I40E_PTT(76, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP,  PAY4),
688 	I40E_PTT_UNUSED_ENTRY(77),
689 	I40E_PTT(78, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP,  PAY4),
690 	I40E_PTT(79, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4),
691 	I40E_PTT(80, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4),
692 
693 	/* IPv4 -> GRE/NAT -> MAC/VLAN --> IPv6 */
694 	I40E_PTT(81, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3),
695 	I40E_PTT(82, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3),
696 	I40E_PTT(83, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP,  PAY4),
697 	I40E_PTT_UNUSED_ENTRY(84),
698 	I40E_PTT(85, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP,  PAY4),
699 	I40E_PTT(86, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
700 	I40E_PTT(87, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),
701 
702 	/* Non Tunneled IPv6 */
703 	I40E_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3),
704 	I40E_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3),
705 	I40E_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP,  PAY3),
706 	I40E_PTT_UNUSED_ENTRY(91),
707 	I40E_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP,  PAY4),
708 	I40E_PTT(93, IP, IPV6, NOF, NONE, NONE, NOF, SCTP, PAY4),
709 	I40E_PTT(94, IP, IPV6, NOF, NONE, NONE, NOF, ICMP, PAY4),
710 
711 	/* IPv6 --> IPv4 */
712 	I40E_PTT(95,  IP, IPV6, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
713 	I40E_PTT(96,  IP, IPV6, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
714 	I40E_PTT(97,  IP, IPV6, NOF, IP_IP, IPV4, NOF, UDP,  PAY4),
715 	I40E_PTT_UNUSED_ENTRY(98),
716 	I40E_PTT(99,  IP, IPV6, NOF, IP_IP, IPV4, NOF, TCP,  PAY4),
717 	I40E_PTT(100, IP, IPV6, NOF, IP_IP, IPV4, NOF, SCTP, PAY4),
718 	I40E_PTT(101, IP, IPV6, NOF, IP_IP, IPV4, NOF, ICMP, PAY4),
719 
720 	/* IPv6 --> IPv6 */
721 	I40E_PTT(102, IP, IPV6, NOF, IP_IP, IPV6, FRG, NONE, PAY3),
722 	I40E_PTT(103, IP, IPV6, NOF, IP_IP, IPV6, NOF, NONE, PAY3),
723 	I40E_PTT(104, IP, IPV6, NOF, IP_IP, IPV6, NOF, UDP,  PAY4),
724 	I40E_PTT_UNUSED_ENTRY(105),
725 	I40E_PTT(106, IP, IPV6, NOF, IP_IP, IPV6, NOF, TCP,  PAY4),
726 	I40E_PTT(107, IP, IPV6, NOF, IP_IP, IPV6, NOF, SCTP, PAY4),
727 	I40E_PTT(108, IP, IPV6, NOF, IP_IP, IPV6, NOF, ICMP, PAY4),
728 
729 	/* IPv6 --> GRE/NAT */
730 	I40E_PTT(109, IP, IPV6, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3),
731 
732 	/* IPv6 --> GRE/NAT -> IPv4 */
733 	I40E_PTT(110, IP, IPV6, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3),
734 	I40E_PTT(111, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3),
735 	I40E_PTT(112, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, UDP,  PAY4),
736 	I40E_PTT_UNUSED_ENTRY(113),
737 	I40E_PTT(114, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, TCP,  PAY4),
738 	I40E_PTT(115, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4),
739 	I40E_PTT(116, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4),
740 
741 	/* IPv6 --> GRE/NAT -> IPv6 */
742 	I40E_PTT(117, IP, IPV6, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3),
743 	I40E_PTT(118, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3),
744 	I40E_PTT(119, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, UDP,  PAY4),
745 	I40E_PTT_UNUSED_ENTRY(120),
746 	I40E_PTT(121, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, TCP,  PAY4),
747 	I40E_PTT(122, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4),
748 	I40E_PTT(123, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4),
749 
750 	/* IPv6 --> GRE/NAT -> MAC */
751 	I40E_PTT(124, IP, IPV6, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3),
752 
753 	/* IPv6 --> GRE/NAT -> MAC -> IPv4 */
754 	I40E_PTT(125, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3),
755 	I40E_PTT(126, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3),
756 	I40E_PTT(127, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP,  PAY4),
757 	I40E_PTT_UNUSED_ENTRY(128),
758 	I40E_PTT(129, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP,  PAY4),
759 	I40E_PTT(130, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4),
760 	I40E_PTT(131, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4),
761 
762 	/* IPv6 --> GRE/NAT -> MAC -> IPv6 */
763 	I40E_PTT(132, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3),
764 	I40E_PTT(133, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3),
765 	I40E_PTT(134, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP,  PAY4),
766 	I40E_PTT_UNUSED_ENTRY(135),
767 	I40E_PTT(136, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP,  PAY4),
768 	I40E_PTT(137, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4),
769 	I40E_PTT(138, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4),
770 
771 	/* IPv6 --> GRE/NAT -> MAC/VLAN */
772 	I40E_PTT(139, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3),
773 
774 	/* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv4 */
775 	I40E_PTT(140, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3),
776 	I40E_PTT(141, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3),
777 	I40E_PTT(142, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP,  PAY4),
778 	I40E_PTT_UNUSED_ENTRY(143),
779 	I40E_PTT(144, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP,  PAY4),
780 	I40E_PTT(145, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4),
781 	I40E_PTT(146, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4),
782 
783 	/* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv6 */
784 	I40E_PTT(147, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3),
785 	I40E_PTT(148, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3),
786 	I40E_PTT(149, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP,  PAY4),
787 	I40E_PTT_UNUSED_ENTRY(150),
788 	I40E_PTT(151, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP,  PAY4),
789 	I40E_PTT(152, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
790 	I40E_PTT(153, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),
791 
792 	/* unused entries */
793 	I40E_PTT_UNUSED_ENTRY(154),
794 	I40E_PTT_UNUSED_ENTRY(155),
795 	I40E_PTT_UNUSED_ENTRY(156),
796 	I40E_PTT_UNUSED_ENTRY(157),
797 	I40E_PTT_UNUSED_ENTRY(158),
798 	I40E_PTT_UNUSED_ENTRY(159),
799 
800 	I40E_PTT_UNUSED_ENTRY(160),
801 	I40E_PTT_UNUSED_ENTRY(161),
802 	I40E_PTT_UNUSED_ENTRY(162),
803 	I40E_PTT_UNUSED_ENTRY(163),
804 	I40E_PTT_UNUSED_ENTRY(164),
805 	I40E_PTT_UNUSED_ENTRY(165),
806 	I40E_PTT_UNUSED_ENTRY(166),
807 	I40E_PTT_UNUSED_ENTRY(167),
808 	I40E_PTT_UNUSED_ENTRY(168),
809 	I40E_PTT_UNUSED_ENTRY(169),
810 
811 	I40E_PTT_UNUSED_ENTRY(170),
812 	I40E_PTT_UNUSED_ENTRY(171),
813 	I40E_PTT_UNUSED_ENTRY(172),
814 	I40E_PTT_UNUSED_ENTRY(173),
815 	I40E_PTT_UNUSED_ENTRY(174),
816 	I40E_PTT_UNUSED_ENTRY(175),
817 	I40E_PTT_UNUSED_ENTRY(176),
818 	I40E_PTT_UNUSED_ENTRY(177),
819 	I40E_PTT_UNUSED_ENTRY(178),
820 	I40E_PTT_UNUSED_ENTRY(179),
821 
822 	I40E_PTT_UNUSED_ENTRY(180),
823 	I40E_PTT_UNUSED_ENTRY(181),
824 	I40E_PTT_UNUSED_ENTRY(182),
825 	I40E_PTT_UNUSED_ENTRY(183),
826 	I40E_PTT_UNUSED_ENTRY(184),
827 	I40E_PTT_UNUSED_ENTRY(185),
828 	I40E_PTT_UNUSED_ENTRY(186),
829 	I40E_PTT_UNUSED_ENTRY(187),
830 	I40E_PTT_UNUSED_ENTRY(188),
831 	I40E_PTT_UNUSED_ENTRY(189),
832 
833 	I40E_PTT_UNUSED_ENTRY(190),
834 	I40E_PTT_UNUSED_ENTRY(191),
835 	I40E_PTT_UNUSED_ENTRY(192),
836 	I40E_PTT_UNUSED_ENTRY(193),
837 	I40E_PTT_UNUSED_ENTRY(194),
838 	I40E_PTT_UNUSED_ENTRY(195),
839 	I40E_PTT_UNUSED_ENTRY(196),
840 	I40E_PTT_UNUSED_ENTRY(197),
841 	I40E_PTT_UNUSED_ENTRY(198),
842 	I40E_PTT_UNUSED_ENTRY(199),
843 
844 	I40E_PTT_UNUSED_ENTRY(200),
845 	I40E_PTT_UNUSED_ENTRY(201),
846 	I40E_PTT_UNUSED_ENTRY(202),
847 	I40E_PTT_UNUSED_ENTRY(203),
848 	I40E_PTT_UNUSED_ENTRY(204),
849 	I40E_PTT_UNUSED_ENTRY(205),
850 	I40E_PTT_UNUSED_ENTRY(206),
851 	I40E_PTT_UNUSED_ENTRY(207),
852 	I40E_PTT_UNUSED_ENTRY(208),
853 	I40E_PTT_UNUSED_ENTRY(209),
854 
855 	I40E_PTT_UNUSED_ENTRY(210),
856 	I40E_PTT_UNUSED_ENTRY(211),
857 	I40E_PTT_UNUSED_ENTRY(212),
858 	I40E_PTT_UNUSED_ENTRY(213),
859 	I40E_PTT_UNUSED_ENTRY(214),
860 	I40E_PTT_UNUSED_ENTRY(215),
861 	I40E_PTT_UNUSED_ENTRY(216),
862 	I40E_PTT_UNUSED_ENTRY(217),
863 	I40E_PTT_UNUSED_ENTRY(218),
864 	I40E_PTT_UNUSED_ENTRY(219),
865 
866 	I40E_PTT_UNUSED_ENTRY(220),
867 	I40E_PTT_UNUSED_ENTRY(221),
868 	I40E_PTT_UNUSED_ENTRY(222),
869 	I40E_PTT_UNUSED_ENTRY(223),
870 	I40E_PTT_UNUSED_ENTRY(224),
871 	I40E_PTT_UNUSED_ENTRY(225),
872 	I40E_PTT_UNUSED_ENTRY(226),
873 	I40E_PTT_UNUSED_ENTRY(227),
874 	I40E_PTT_UNUSED_ENTRY(228),
875 	I40E_PTT_UNUSED_ENTRY(229),
876 
877 	I40E_PTT_UNUSED_ENTRY(230),
878 	I40E_PTT_UNUSED_ENTRY(231),
879 	I40E_PTT_UNUSED_ENTRY(232),
880 	I40E_PTT_UNUSED_ENTRY(233),
881 	I40E_PTT_UNUSED_ENTRY(234),
882 	I40E_PTT_UNUSED_ENTRY(235),
883 	I40E_PTT_UNUSED_ENTRY(236),
884 	I40E_PTT_UNUSED_ENTRY(237),
885 	I40E_PTT_UNUSED_ENTRY(238),
886 	I40E_PTT_UNUSED_ENTRY(239),
887 
888 	I40E_PTT_UNUSED_ENTRY(240),
889 	I40E_PTT_UNUSED_ENTRY(241),
890 	I40E_PTT_UNUSED_ENTRY(242),
891 	I40E_PTT_UNUSED_ENTRY(243),
892 	I40E_PTT_UNUSED_ENTRY(244),
893 	I40E_PTT_UNUSED_ENTRY(245),
894 	I40E_PTT_UNUSED_ENTRY(246),
895 	I40E_PTT_UNUSED_ENTRY(247),
896 	I40E_PTT_UNUSED_ENTRY(248),
897 	I40E_PTT_UNUSED_ENTRY(249),
898 
899 	I40E_PTT_UNUSED_ENTRY(250),
900 	I40E_PTT_UNUSED_ENTRY(251),
901 	I40E_PTT_UNUSED_ENTRY(252),
902 	I40E_PTT_UNUSED_ENTRY(253),
903 	I40E_PTT_UNUSED_ENTRY(254),
904 	I40E_PTT_UNUSED_ENTRY(255)
905 };
906 
907 /**
908  * i40e_aq_send_msg_to_pf
909  * @hw: pointer to the hardware structure
910  * @v_opcode: opcodes for VF-PF communication
911  * @v_retval: return error code
912  * @msg: pointer to the msg buffer
913  * @msglen: msg length
914  * @cmd_details: pointer to command details
915  *
916  * Send message to PF driver using admin queue. By default, this message
917  * is sent asynchronously, i.e. i40evf_asq_send_command() does not wait for
918  * completion before returning.
919  **/
i40e_aq_send_msg_to_pf(struct i40e_hw * hw,enum i40e_virtchnl_ops v_opcode,i40e_status v_retval,u8 * msg,u16 msglen,struct i40e_asq_cmd_details * cmd_details)920 i40e_status i40e_aq_send_msg_to_pf(struct i40e_hw *hw,
921 				enum i40e_virtchnl_ops v_opcode,
922 				i40e_status v_retval,
923 				u8 *msg, u16 msglen,
924 				struct i40e_asq_cmd_details *cmd_details)
925 {
926 	struct i40e_aq_desc desc;
927 	struct i40e_asq_cmd_details details;
928 	i40e_status status;
929 
930 	i40evf_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_pf);
931 	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
932 	desc.cookie_high = cpu_to_le32(v_opcode);
933 	desc.cookie_low = cpu_to_le32(v_retval);
934 	if (msglen) {
935 		desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF
936 						| I40E_AQ_FLAG_RD));
937 		if (msglen > I40E_AQ_LARGE_BUF)
938 			desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
939 		desc.datalen = cpu_to_le16(msglen);
940 	}
941 	if (!cmd_details) {
942 		memset(&details, 0, sizeof(details));
943 		details.async = true;
944 		cmd_details = &details;
945 	}
946 	status = i40evf_asq_send_command(hw, &desc, msg, msglen, cmd_details);
947 	return status;
948 }
949 
950 /**
951  * i40e_vf_parse_hw_config
952  * @hw: pointer to the hardware structure
953  * @msg: pointer to the virtual channel VF resource structure
954  *
955  * Given a VF resource message from the PF, populate the hw struct
956  * with appropriate information.
957  **/
i40e_vf_parse_hw_config(struct i40e_hw * hw,struct i40e_virtchnl_vf_resource * msg)958 void i40e_vf_parse_hw_config(struct i40e_hw *hw,
959 			     struct i40e_virtchnl_vf_resource *msg)
960 {
961 	struct i40e_virtchnl_vsi_resource *vsi_res;
962 	int i;
963 
964 	vsi_res = &msg->vsi_res[0];
965 
966 	hw->dev_caps.num_vsis = msg->num_vsis;
967 	hw->dev_caps.num_rx_qp = msg->num_queue_pairs;
968 	hw->dev_caps.num_tx_qp = msg->num_queue_pairs;
969 	hw->dev_caps.num_msix_vectors_vf = msg->max_vectors;
970 	hw->dev_caps.dcb = msg->vf_offload_flags &
971 			   I40E_VIRTCHNL_VF_OFFLOAD_L2;
972 	hw->dev_caps.fcoe = (msg->vf_offload_flags &
973 			     I40E_VIRTCHNL_VF_OFFLOAD_FCOE) ? 1 : 0;
974 	for (i = 0; i < msg->num_vsis; i++) {
975 		if (vsi_res->vsi_type == I40E_VSI_SRIOV) {
976 			ether_addr_copy(hw->mac.perm_addr,
977 					vsi_res->default_mac_addr);
978 			ether_addr_copy(hw->mac.addr,
979 					vsi_res->default_mac_addr);
980 		}
981 		vsi_res++;
982 	}
983 }
984 
985 /**
986  * i40e_vf_reset
987  * @hw: pointer to the hardware structure
988  *
989  * Send a VF_RESET message to the PF. Does not wait for response from PF
990  * as none will be forthcoming. Immediately after calling this function,
991  * the admin queue should be shut down and (optionally) reinitialized.
992  **/
i40e_vf_reset(struct i40e_hw * hw)993 i40e_status i40e_vf_reset(struct i40e_hw *hw)
994 {
995 	return i40e_aq_send_msg_to_pf(hw, I40E_VIRTCHNL_OP_RESET_VF,
996 				      0, NULL, 0, NULL);
997 }
998