Searched refs:xclk (Results 1 - 27 of 27) sorted by relevance

/linux-4.4.14/drivers/media/usb/em28xx/
H A Dem28xx-camera.c354 * need to use a lower xclk frequency. em28xx_init_camera()
355 * Yet, it would be possible to adjust xclk depending on the em28xx_init_camera()
359 dev->board.xclk = EM28XX_XCLK_FREQUENCY_4_3MHZ; em28xx_init_camera()
360 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk); em28xx_init_camera()
390 dev->board.xclk = EM28XX_XCLK_FREQUENCY_48MHZ; em28xx_init_camera()
391 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk); em28xx_init_camera()
416 * - adjust bridge xclk em28xx_init_camera()
436 dev->board.xclk = EM28XX_XCLK_FREQUENCY_24MHZ; em28xx_init_camera()
437 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk); em28xx_init_camera()
H A Dem28xx-input.c387 /* Adjust xclk based on IR table for RC5/NEC tables */ em2860_ir_change_protocol()
389 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE; em2860_ir_change_protocol()
393 dev->board.xclk &= ~EM28XX_XCLK_IR_RC5_MODE; em2860_ir_change_protocol()
402 em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, dev->board.xclk, em2860_ir_change_protocol()
416 /* Adjust xclk and set type based on IR table for RC5/NEC/RC6 tables */ em2874_ir_change_protocol()
418 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE; em2874_ir_change_protocol()
422 dev->board.xclk &= ~EM28XX_XCLK_IR_RC5_MODE; em2874_ir_change_protocol()
427 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE; em2874_ir_change_protocol()
438 em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, dev->board.xclk, em2874_ir_change_protocol()
H A Dem28xx-cards.c569 .xclk = EM28XX_XCLK_FREQUENCY_20MHZ,
604 .xclk = EM28XX_XCLK_FREQUENCY_48MHZ,
927 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
1021 .xclk = EM28XX_XCLK_I2S_MSB_TIMING |
1076 .xclk = EM28XX_XCLK_IR_RC5_MODE |
1335 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, /* NEC IR */
1589 .xclk = EM28XX_XCLK_FREQUENCY_10MHZ,
1697 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
1826 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, /* NEC IR */
1851 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
1892 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
2003 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
2019 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
2055 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, /* NEC IR */
2230 .xclk = EM28XX_XCLK_FREQUENCY_24MHZ,
2535 if (!dev->board.xclk) em28xx_set_model()
2536 dev->board.xclk = EM28XX_XCLK_IR_RC5_MODE | em28xx_set_model()
2554 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk & 0x7f); em28xx_pre_card_setup()
H A Dem28xx-core.c434 u8 xclk; em28xx_audio_analog_set() local
452 xclk = dev->board.xclk & 0x7f; em28xx_audio_analog_set()
454 xclk |= EM28XX_XCLK_AUDIO_UNMUTE; em28xx_audio_analog_set()
456 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk); em28xx_audio_analog_set()
H A Dem28xx.h465 unsigned char xclk, i2c_speed; member in struct:em28xx_board
/linux-4.4.14/drivers/media/platform/omap3isp/
H A Disp.c160 static void isp_xclk_update(struct isp_xclk *xclk, u32 divider) isp_xclk_update() argument
162 switch (xclk->id) { isp_xclk_update()
164 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, isp_xclk_update()
169 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, isp_xclk_update()
178 struct isp_xclk *xclk = to_isp_xclk(hw); isp_xclk_prepare() local
180 omap3isp_get(xclk->isp); isp_xclk_prepare()
187 struct isp_xclk *xclk = to_isp_xclk(hw); isp_xclk_unprepare() local
189 omap3isp_put(xclk->isp); isp_xclk_unprepare()
194 struct isp_xclk *xclk = to_isp_xclk(hw); isp_xclk_enable() local
197 spin_lock_irqsave(&xclk->lock, flags); isp_xclk_enable()
198 isp_xclk_update(xclk, xclk->divider); isp_xclk_enable()
199 xclk->enabled = true; isp_xclk_enable()
200 spin_unlock_irqrestore(&xclk->lock, flags); isp_xclk_enable()
207 struct isp_xclk *xclk = to_isp_xclk(hw); isp_xclk_disable() local
210 spin_lock_irqsave(&xclk->lock, flags); isp_xclk_disable()
211 isp_xclk_update(xclk, 0); isp_xclk_disable()
212 xclk->enabled = false; isp_xclk_disable()
213 spin_unlock_irqrestore(&xclk->lock, flags); isp_xclk_disable()
219 struct isp_xclk *xclk = to_isp_xclk(hw); isp_xclk_recalc_rate() local
221 return parent_rate / xclk->divider; isp_xclk_recalc_rate()
254 struct isp_xclk *xclk = to_isp_xclk(hw); isp_xclk_set_rate() local
260 spin_lock_irqsave(&xclk->lock, flags); isp_xclk_set_rate()
262 xclk->divider = divider; isp_xclk_set_rate()
263 if (xclk->enabled) isp_xclk_set_rate()
264 isp_xclk_update(xclk, divider); isp_xclk_set_rate()
266 spin_unlock_irqrestore(&xclk->lock, flags); isp_xclk_set_rate()
268 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n", isp_xclk_set_rate()
269 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider); isp_xclk_set_rate()
313 struct isp_xclk *xclk = &isp->xclks[i]; isp_xclk_init() local
315 xclk->isp = isp; isp_xclk_init()
316 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B; isp_xclk_init()
317 xclk->divider = 1; isp_xclk_init()
318 spin_lock_init(&xclk->lock); isp_xclk_init()
325 xclk->hw.init = &init; isp_xclk_init()
332 xclk->clk = clk_register(NULL, &xclk->hw); isp_xclk_init()
333 if (IS_ERR(xclk->clk)) isp_xclk_init()
334 return PTR_ERR(xclk->clk); isp_xclk_init()
352 struct isp_xclk *xclk = &isp->xclks[i]; isp_xclk_cleanup() local
354 if (!IS_ERR(xclk->clk)) isp_xclk_cleanup()
355 clk_unregister(xclk->clk); isp_xclk_cleanup()
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dsumo_smc.c148 u32 xclk = radeon_get_xclk(rdev); sumo_enable_boost_timer() local
153 period = 100 * (xclk / 100 / sumo_power_of_4(unit)); sumo_enable_boost_timer()
H A Dsumo_dpm.c124 u32 xclk = radeon_get_xclk(rdev); sumo_program_git() local
127 xclk, 16, &p, &u); sumo_program_git()
135 u32 xclk = radeon_get_xclk(rdev); sumo_program_grsd() local
138 r600_calculate_u_and_p(1, xclk, 14, &p, &u); sumo_program_grsd()
155 u32 xclk = radeon_get_xclk(rdev); sumo_gfx_powergating_initialize() local
174 xclk, 16, &p, &u); sumo_gfx_powergating_initialize()
180 xclk, 16, &p, &u); sumo_gfx_powergating_initialize()
319 u32 xclk = radeon_get_xclk(rdev); sumo_calculate_bsp() local
325 xclk, 16, &pi->bsp, &pi->bsu); sumo_calculate_bsp()
328 xclk, 16, &pi->pbsp, &pi->pbsu); sumo_calculate_bsp()
466 u32 xclk = radeon_get_xclk(rdev); sumo_program_sstp() local
469 xclk, 16, &p, &u); sumo_program_sstp()
928 u32 xclk = radeon_get_xclk(rdev); sumo_program_ttp() local
933 xclk, 16, &p, &u); sumo_program_ttp()
974 u32 xclk = radeon_get_xclk(rdev); sumo_program_dc_hto() local
977 xclk, 14, &p, &u); sumo_program_dc_hto()
H A Dtrinity_dpm.c367 u32 xclk = radeon_get_xclk(rdev); trinity_gfx_powergating_initialize() local
384 r600_calculate_u_and_p(500, xclk, 16, &p, &u); trinity_gfx_powergating_initialize()
886 u32 xclk = radeon_get_xclk(rdev); trinity_setup_uvd_dpm_interval() local
888 r600_calculate_u_and_p(interval, xclk, 16, &p, &u); trinity_setup_uvd_dpm_interval()
1029 u32 xclk = radeon_get_xclk(rdev); trinity_program_sclk_dpm() local
1032 r600_calculate_u_and_p(400, xclk, 16, &p, &u); trinity_program_sclk_dpm()
H A Dsi_dpm.c2098 u32 xclk; si_calculate_cac_wintime() local
2103 xclk = radeon_get_xclk(rdev); si_calculate_cac_wintime()
2105 if (xclk == 0) si_calculate_cac_wintime()
2111 wintime = (cac_window_size * 100) / xclk; si_calculate_cac_wintime()
3755 u32 xclk = radeon_get_xclk(rdev); si_setup_bsp() local
3758 xclk, si_setup_bsp()
3764 xclk, si_setup_bsp()
6237 u32 xclk = radeon_get_xclk(rdev);
6249 *speed = 60 * xclk * 10000 / tach_period;
6258 u32 xclk = radeon_get_xclk(rdev);
6273 tach_period = 60 * xclk * 10000 / (8 * speed);
H A Drv770_dpm.c819 u32 xclk = radeon_get_xclk(rdev); rv770_setup_bsp() local
822 xclk, rv770_setup_bsp()
828 xclk, rv770_setup_bsp()
H A Dci_dpm.c1157 u32 xclk = radeon_get_xclk(rdev);
1169 *speed = 60 * xclk * 10000 / tach_period;
1178 u32 xclk = radeon_get_xclk(rdev);
1193 tach_period = 60 * xclk * 10000 / (8 * speed);
H A Drv770.c783 * rv770_get_xclk - get the xclk
H A Dni_dpm.c1366 u32 xclk = radeon_get_xclk(rdev); ni_get_smc_power_scaling_factor() local
1369 xclk_period = (1000000000UL / xclk); ni_get_smc_power_scaling_factor()
H A Dr600.c185 * r600_get_xclk - get the xclk
H A Dsi.c1301 * si_get_xclk - get the xclk
H A Dcik.c1706 * cik_get_xclk - get the xclk
/linux-4.4.14/drivers/video/fbdev/aty/
H A Datyfb_base.c307 static int xclk; variable
368 int pll, mclk, xclk, ecp_max; member in struct:__anon11098
457 par->pll_limits.xclk = aty_chips[i].xclk; correct_chipset()
485 par->pll_limits.xclk = 67; correct_chipset()
493 par->pll_limits.xclk = 67; correct_chipset()
503 par->pll_limits.xclk = 67; correct_chipset()
511 par->pll_limits.xclk = 67; correct_chipset()
523 par->pll_limits.xclk = 67; correct_chipset()
531 par->pll_limits.xclk = 67; correct_chipset()
2279 static void aty_calc_mem_refresh(struct atyfb_par *par, int xclk) aty_calc_mem_refresh() argument
2300 if (xclk < refresh_tbl[i]) aty_calc_mem_refresh()
2434 par->pll_limits.xclk = (par->pll_limits.xclk + 1) >> 1; aty_init()
2444 par->pll_limits.xclk = 53; aty_init()
2453 if (xclk) aty_init()
2454 par->pll_limits.xclk = xclk; aty_init()
2456 aty_calc_mem_refresh(par, par->pll_limits.xclk); aty_init()
2459 par->xclk_per = 1000000/par->pll_limits.xclk; aty_init()
2585 par->pll_limits.xclk); aty_init()
3408 par->pll_limits.xclk = pll_block.XCLK_max_freq/100; init_from_bios()
3853 else if (!strncmp(this_opt, "xclk:", 5)) atyfb_setup()
3854 xclk = simple_strtoul(this_opt+5, NULL, 0); atyfb_setup()
4010 module_param(xclk, int, 0);
4011 MODULE_PARM_DESC(xclk, "int: override accelerated engine clock");
H A Dmach64_ct.c421 printk(KERN_CRIT "atyfb: Unsupported xclk source: %d.\n", pll->ct.xclk_post_div); aty_init_pll_ct()
530 printk(KERN_CRIT "atxfb: xclk out of range\n"); aty_init_pll_ct()
551 printk("atyfb(%s): pllmclk=%d MHz, xclk=%d MHz\n", aty_init_pll_ct()
569 pll->ct.pll_gen_cntl |= (xpost_div << 4); /* mclk == xclk */ aty_init_pll_ct()
H A Daty128fb.c414 u32 xclk; member in struct:aty128_constants
920 par->constants.xclk = BIOS_IN16(bios_pll + 0x08); aty128_get_pllinfo()
924 DBG("ppll_max %d ppll_min %d xclk %d ref_divider %d ref clock %d\n", aty128_get_pllinfo()
926 par->constants.xclk, par->constants.ref_divider, aty128_get_pllinfo()
979 par->constants.xclk = round_div((2 * Nx * par->constants.ref_clk), aty128_timings()
1000 if (!par->constants.xclk) aty128_timings()
1001 par->constants.xclk = 0x1d4d; /* same as mclk */ aty128_timings()
1440 u32 xclk = par->constants.xclk; aty128_ddafifo() local
1449 n = xclk * fifo_width; aty128_ddafifo()
H A Datyfb.h49 int sclk, mclk, mclk_pm, xclk; member in struct:pll_info
/linux-4.4.14/drivers/media/usb/cx231xx/
H A Dcx231xx.h375 unsigned char xclk, i2c_speed; member in struct:cx231xx_board
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Dci_dpm.c1282 u32 xclk = amdgpu_asic_get_xclk(adev);
1295 *speed = 60 * xclk * 10000 / tach_period;
1304 u32 xclk = amdgpu_asic_get_xclk(adev);
1319 tach_period = 60 * xclk * 10000 / (8 * speed);
H A Dvi.c281 * vi_get_xclk - get the xclk
H A Dcik.c830 * cik_get_xclk - get the xclk
/linux-4.4.14/drivers/media/i2c/smiapp/
H A Dsmiapp-core.c1208 dev_dbg(&client->dev, "failed to enable xclk\n"); smiapp_power_on()
/linux-4.4.14/arch/arm/mach-omap2/
H A Domap_hwmod_44xx_data.c3032 { .role = "xclk", .clk = "usb_otg_hs_xclk" },

Completed in 1348 milliseconds