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Searched refs:wb_gpu_addr (Results 1 – 3 of 3) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Dgfx_v8_0.c3734 u64 wb_gpu_addr; in gfx_v8_0_cp_compute_resume() local
3889 wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v8_0_cp_compute_resume()
3890 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v8_0_cp_compute_resume()
3892 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v8_0_cp_compute_resume()
3899 wb_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in gfx_v8_0_cp_compute_resume()
3900 mqd->cp_hqd_pq_wptr_poll_addr = wb_gpu_addr & 0xfffffffc; in gfx_v8_0_cp_compute_resume()
3901 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v8_0_cp_compute_resume()
Dgfx_v7_0.c3329 u64 wb_gpu_addr; in gfx_v7_0_cp_compute_resume() local
3490 wb_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in gfx_v7_0_cp_compute_resume()
3491 mqd->queue_state.cp_hqd_pq_wptr_poll_addr = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_cp_compute_resume()
3492 mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v7_0_cp_compute_resume()
3498 wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v7_0_cp_compute_resume()
3499 mqd->queue_state.cp_hqd_pq_rptr_report_addr = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_cp_compute_resume()
3501 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v7_0_cp_compute_resume()
/linux-4.4.14/drivers/gpu/drm/radeon/
Dcik.c4934 u64 wb_gpu_addr; in cik_cp_compute_resume() local
5090 wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP1_WPTR_OFFSET; in cik_cp_compute_resume()
5092 wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP2_WPTR_OFFSET; in cik_cp_compute_resume()
5093 mqd->queue_state.cp_hqd_pq_wptr_poll_addr = wb_gpu_addr & 0xfffffffc; in cik_cp_compute_resume()
5094 mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in cik_cp_compute_resume()
5101 wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET; in cik_cp_compute_resume()
5103 wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET; in cik_cp_compute_resume()
5104 mqd->queue_state.cp_hqd_pq_rptr_report_addr = wb_gpu_addr & 0xfffffffc; in cik_cp_compute_resume()
5106 upper_32_bits(wb_gpu_addr) & 0xffff; in cik_cp_compute_resume()