| /linux-4.4.14/drivers/video/fbdev/omap2/dss/ |
| H A D | video-pll.c | 36 static void dss_dpll_enable_scp_clk(struct dss_video_pll *vpll) dss_dpll_enable_scp_clk() argument
38 REG_MOD(vpll->clkctrl_base, 1, 14, 14); /* CIO_CLK_ICG */ dss_dpll_enable_scp_clk()
41 static void dss_dpll_disable_scp_clk(struct dss_video_pll *vpll) dss_dpll_disable_scp_clk() argument
43 REG_MOD(vpll->clkctrl_base, 0, 14, 14); /* CIO_CLK_ICG */ dss_dpll_disable_scp_clk()
46 static void dss_dpll_power_enable(struct dss_video_pll *vpll) dss_dpll_power_enable() argument
48 REG_MOD(vpll->clkctrl_base, 2, 31, 30); /* PLL_POWER_ON_ALL */ dss_dpll_power_enable()
57 static void dss_dpll_power_disable(struct dss_video_pll *vpll) dss_dpll_power_disable() argument
59 REG_MOD(vpll->clkctrl_base, 0, 31, 30); /* PLL_POWER_OFF */ dss_dpll_power_disable()
64 struct dss_video_pll *vpll = container_of(pll, struct dss_video_pll, pll); dss_video_pll_enable() local
73 dss_dpll_enable_scp_clk(vpll); dss_video_pll_enable()
79 dss_dpll_power_enable(vpll); dss_video_pll_enable()
84 dss_dpll_disable_scp_clk(vpll); dss_video_pll_enable()
93 struct dss_video_pll *vpll = container_of(pll, struct dss_video_pll, pll); dss_video_pll_disable() local
95 dss_dpll_power_disable(vpll); dss_video_pll_disable()
97 dss_dpll_disable_scp_clk(vpll); dss_video_pll_disable()
139 struct dss_video_pll *vpll; dss_video_pll_init() local
184 vpll = devm_kzalloc(&pdev->dev, sizeof(*vpll), GFP_KERNEL); dss_video_pll_init()
185 if (!vpll) dss_video_pll_init()
188 vpll->dev = &pdev->dev; dss_video_pll_init()
189 vpll->clkctrl_base = clkctrl_base; dss_video_pll_init()
191 pll = &vpll->pll; dss_video_pll_init()
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| /linux-4.4.14/drivers/mfd/ |
| H A D | stw481x.c | 81 u8 vpll; stw481x_startup() local
112 vpll = (ret >> 4) & 1; /* Save bit 4 */ stw481x_startup()
117 vpll |= (ret >> 1) & 2; stw481x_startup()
124 vpll_val[vpll] / 100, vpll_val[vpll] % 100, stw481x_startup()
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| H A D | db8500-prcmu.c | 2866 .name = "db8500-vpll",
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| /linux-4.4.14/drivers/video/fbdev/nvidia/ |
| H A D | nv_type.h | 70 u32 vpll; member in struct:_riva_hw_state
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| H A D | nvidia.c | 435 state->vpll = state->pll; nvidia_calc_regs()
448 state->vpll = NV_RD32(par->PRAMDAC0, 0x00000508); nvidia_calc_regs()
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| H A D | nv_hw.c | 1591 NV_WR32(par->PRAMDAC0, 0x0508, state->vpll); NVLoadStateExt()
1643 state->vpll = NV_RD32(par->PRAMDAC0, 0x0508); NVUnloadStateExt()
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| /linux-4.4.14/drivers/clk/samsung/ |
| H A D | clk-exynos5250.c | 107 apll, mpll, cpll, epll, vpll, gpll, bpll, enumerator in enum:exynos5250_plls
758 [vpll] = PLL(pll_36xx, CLK_FOUT_VPLL, "fout_vpll", "mout_vpllsrc",
822 exynos5250_plls[vpll].rate_table = vpll_24mhz_tbl; exynos5250_clk_init()
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| H A D | clk-s5pv210.c | 75 vpll, enumerator in enum:__anon3786
763 [vpll] = PLL(pll_4502, FOUT_VPLL, "fout_vpll", "mout_vpllsrc",
775 [vpll] = PLL(pll_4500, FOUT_VPLL, "fout_vpll", "fin_pll",
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| H A D | clk-exynos4.c | 153 apll, mpll, epll, vpll, enumerator in enum:exynos4_plls
1346 [vpll] = PLL_A(pll_4650c, CLK_FOUT_VPLL, "fout_vpll", "mout_vpllsrc",
1357 [vpll] = PLL(pll_36xx, CLK_FOUT_VPLL, "fout_vpll", "fin_pll",
1473 exynos4210_plls[vpll].rate_table = exynos4_clk_init()
1484 exynos4x12_plls[vpll].rate_table = exynos4_clk_init()
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| H A D | clk-exynos5420.c | 146 apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, enumerator in enum:exynos5x_plls
1239 [vpll] = PLL(pll_2550, CLK_FOUT_VPLL, "fout_vpll", "fin_pll", VPLL_LOCK,
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| /linux-4.4.14/drivers/media/platform/s5p-tv/ |
| H A D | sdo_drv.c | 58 /** vpll rate before sdo stream was on */
208 dev_err(sdev->dev, "Failed to set vpll rate\n"); sdo_streamon()
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| H A D | hdmi_drv.c | 557 /* pixel(vpll) clock is used for HDMI in config mode */ hdmi_streamoff()
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| /linux-4.4.14/drivers/regulator/ |
| H A D | db8500-prcmu.c | 243 .name = "db8500-vpll",
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| H A D | tps65910-regulator.c | 151 .name = "vpll",
977 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
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| /linux-4.4.14/drivers/clk/ingenic/ |
| H A D | jz4780-cgu.c | 265 "vpll", CGU_CLK_PLL,
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| /linux-4.4.14/drivers/gpu/drm/nouveau/dispnv04/ |
| H A D | crtc.c | 130 /* for newer nv4x the blob uses only the first stage of the vpll below a nv_crtc_calc_state_ext()
159 NV_DEBUG(drm, "vpll: n1 %d n2 %d m1 %d m2 %d log2p %d\n", nv_crtc_calc_state_ext()
162 NV_DEBUG(drm, "vpll: n %d m %d log2p %d\n", nv_crtc_calc_state_ext()
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| H A D | hw.c | 190 /* check whether vpll has been forced into single stage mode */ nouveau_hw_get_pllvals()
248 /* the vpll on an unused head can come up with a random value, way nouveau_hw_fix_bad_vpll()
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| /linux-4.4.14/drivers/video/fbdev/riva/ |
| H A D | riva_hw.h | 509 U032 vpll; member in struct:_riva_hw_state
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| H A D | riva_hw.c | 1326 state->vpll = (p << 16) | (n << 8) | m; CalcStateExt()
1710 NV_WR32(chip->PRAMDAC0, 0x00000508, state->vpll); LoadStateExt()
1770 state->vpll = NV_RD32(chip->PRAMDAC0, 0x00000508); UnloadStateExt()
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| H A D | fbdev.c | 801 newmode.ext.vpll2 = newmode.ext.vpll; riva_load_video_mode()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| H A D | nv04.c | 132 * the shift for vpll regs is only used for nv3x chips with a single powerctrl_1_shift()
|