Searched refs:vmw_mmio_read (Results 1 – 6 of 6) sorted by relevance
63 fifo_min = vmw_mmio_read(fifo_mem + SVGA_FIFO_MIN); in vmw_fifo_have_3d()67 hwversion = vmw_mmio_read(fifo_mem + in vmw_fifo_have_3d()94 caps = vmw_mmio_read(fifo_mem + SVGA_FIFO_CAPABILITIES); in vmw_fifo_have_pitchlock()150 max = vmw_mmio_read(fifo_mem + SVGA_FIFO_MAX); in vmw_fifo_init()151 min = vmw_mmio_read(fifo_mem + SVGA_FIFO_MIN); in vmw_fifo_init()152 fifo->capabilities = vmw_mmio_read(fifo_mem + SVGA_FIFO_CAPABILITIES); in vmw_fifo_init()184 dev_priv->last_read_seqno = vmw_mmio_read(fifo_mem + SVGA_FIFO_FENCE); in vmw_fifo_release()209 uint32_t max = vmw_mmio_read(fifo_mem + SVGA_FIFO_MAX); in vmw_fifo_is_full()210 uint32_t next_cmd = vmw_mmio_read(fifo_mem + SVGA_FIFO_NEXT_CMD); in vmw_fifo_is_full()211 uint32_t min = vmw_mmio_read(fifo_mem + SVGA_FIFO_MIN); in vmw_fifo_is_full()[all …]
146 u32 seqno = vmw_mmio_read(fifo_mem + SVGA_FIFO_FENCE); in vmw_fence_enable_signaling()396 goal_seqno = vmw_mmio_read(fifo_mem + SVGA_FIFO_FENCE_GOAL); in vmw_fence_goal_new_locked()439 goal_seqno = vmw_mmio_read(fifo_mem + SVGA_FIFO_FENCE_GOAL); in vmw_fence_goal_check_locked()458 seqno = vmw_mmio_read(fifo_mem + SVGA_FIFO_FENCE); in __vmw_fences_update()480 new_seqno = vmw_mmio_read(fifo_mem + SVGA_FIFO_FENCE); in __vmw_fences_update()
74 uint32_t seqno = vmw_mmio_read(fifo_mem + SVGA_FIFO_FENCE); in vmw_update_seqno()
76 vmw_mmio_read(fifo_mem + in vmw_getparam_ioctl()
132 count = vmw_mmio_read(fifo_mem + SVGA_FIFO_CURSOR_COUNT); in vmw_cursor_update_position()1227 vmw_priv->vga_pitchlock = vmw_mmio_read(vmw_priv->mmio_virt + in vmw_kms_save_vga()
1218 static inline u32 vmw_mmio_read(u32 *addr) in vmw_mmio_read() function