Searched refs:vclk_div (Results 1 - 5 of 5) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dradeon_uvd.c930 unsigned vclk_div, dclk_div, score; radeon_uvd_calc_upll_dividers() local
941 vclk_div = radeon_uvd_calc_upll_post_div(vco_freq, vclk, radeon_uvd_calc_upll_dividers()
943 if (vclk_div > pd_max) radeon_uvd_calc_upll_dividers()
949 if (vclk_div > pd_max) radeon_uvd_calc_upll_dividers()
953 score = vclk - (vco_freq / vclk_div) + dclk - (vco_freq / dclk_div); radeon_uvd_calc_upll_dividers()
958 *optimal_vclk_div = vclk_div; radeon_uvd_calc_upll_dividers()
H A Drv770.c49 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; rv770_set_uvd_clocks() local
69 &fb_div, &vclk_div, &dclk_div); rv770_set_uvd_clocks()
74 vclk_div -= 1; rv770_set_uvd_clocks()
97 UPLL_SW_HILEN(vclk_div >> 1) | rv770_set_uvd_clocks()
98 UPLL_SW_LOLEN((vclk_div >> 1) + (vclk_div & 1)) | rv770_set_uvd_clocks()
H A Dr600.c199 unsigned fb_div = 0, ref_div, vclk_div = 0, dclk_div = 0; r600_set_uvd_clocks() local
228 &fb_div, &vclk_div, &dclk_div); r600_set_uvd_clocks()
255 UPLL_SW_HILEN(vclk_div >> 1) | r600_set_uvd_clocks()
256 UPLL_SW_LOLEN((vclk_div >> 1) + (vclk_div & 1)) | r600_set_uvd_clocks()
H A Devergreen.c1187 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; evergreen_set_uvd_clocks() local
1206 &fb_div, &vclk_div, &dclk_div); evergreen_set_uvd_clocks()
1245 UPLL_PDIV_A(vclk_div) | UPLL_PDIV_B(dclk_div), evergreen_set_uvd_clocks()
H A Dsi.c7324 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; si_set_uvd_clocks() local
7342 &fb_div, &vclk_div, &dclk_div); si_set_uvd_clocks()
7383 UPLL_PDIV_A(vclk_div) | UPLL_PDIV_B(dclk_div), si_set_uvd_clocks()

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