Searched refs:ui32 (Results 1 – 3 of 3) sorted by relevance
535 reg_sq_cmd.bits.simd_id = pMsg->ui32.SIMD; in dbgdev_wave_control_set_registers()536 reg_sq_cmd.bits.wave_id = pMsg->ui32.WaveId; in dbgdev_wave_control_set_registers()539 reg_gfx_index.bits.sh_index = pMsg->ui32.ShaderArray; in dbgdev_wave_control_set_registers()540 reg_gfx_index.bits.se_index = pMsg->ui32.ShaderEngine; in dbgdev_wave_control_set_registers()541 reg_gfx_index.bits.instance_index = pMsg->ui32.HSACU; in dbgdev_wave_control_set_registers()562 reg_gfx_index.bits.sh_index = pMsg->ui32.ShaderArray; in dbgdev_wave_control_set_registers()563 reg_gfx_index.bits.se_index = pMsg->ui32.ShaderEngine; in dbgdev_wave_control_set_registers()564 reg_gfx_index.bits.instance_index = pMsg->ui32.HSACU; in dbgdev_wave_control_set_registers()
80 struct ui32 { struct93 } ui32; member
168 uint32_t ui32 = 0; in amdgpu_info_ioctl() local177 ui32 = adev->accel_working; in amdgpu_info_ioctl()178 return copy_to_user(out, &ui32, min(size, 4u)) ? -EFAULT : 0; in amdgpu_info_ioctl()184 ui32 = amdgpu_crtc->crtc_id; in amdgpu_info_ioctl()193 return copy_to_user(out, &ui32, min(size, 4u)) ? -EFAULT : 0; in amdgpu_info_ioctl()