Searched refs:uart3_ck (Results 1 - 5 of 5) sorted by relevance

/linux-4.4.14/arch/arm/mach-omap1/
H A Dserial.c32 static struct clk * uart3_ck; variable in typeref:struct:clk
165 uart3_ck = clk_get(NULL, "uart3_ck"); omap_serial_init()
166 if (IS_ERR(uart3_ck)) omap_serial_init()
167 printk("Could not get uart3_ck\n"); omap_serial_init()
169 clk_enable(uart3_ck); omap_serial_init()
171 clk_set_rate(uart3_ck, 12000000); omap_serial_init()
209 if (uart3_ck != NULL) { omap_serial_wake_trigger()
248 if (uart3_ck != NULL) omap_serial_wakeup_init()
H A Dclock_data.c477 .name = "uart3_ck",
497 .name = "uart3_ck",
716 CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310),
717 CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX),
/linux-4.4.14/arch/arm/mach-lpc32xx/
H A Dserial.c50 .uart_ck_name = "uart3_ck",
H A Dclock.c1213 CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3),
/linux-4.4.14/drivers/clk/mediatek/
H A Dclk-mt8135.c474 GATE_PERI0(CLK_PERI_UART3, "uart3_ck", "axi_sel", 25),

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