Searched refs:txreadyq (Results 1 - 10 of 10) sorted by relevance

/linux-4.4.14/arch/arm/mach-ixp4xx/include/mach/
H A Dplatform.h102 u8 txreadyq; member in struct:eth_plat_info
112 u8 txreadyq; member in struct:hss_plat_info
/linux-4.4.14/arch/arm/mach-ixp4xx/
H A Dvulcan-setup.c127 .txreadyq = 20,
132 .txreadyq = 21,
H A Dfsg-setup.c131 .txreadyq = 20,
135 .txreadyq = 21,
H A Dixdp425-setup.c186 .txreadyq = 20,
190 .txreadyq = 21,
H A Domixp-setup.c178 .txreadyq = 20,
182 .txreadyq = 21,
H A Dgoramo_mlr.c285 .txreadyq = 32,
289 .txreadyq = 33,
312 .txreadyq = 34,
317 .txreadyq = 35,
H A Dnas100d-setup.c164 .txreadyq = 20,
H A Dnslu2-setup.c176 .txreadyq = 20,
/linux-4.4.14/drivers/net/ethernet/xscale/
H A Dixp4xx_eth.c828 start = qmgr_stat_below_low_watermark(port->plat->txreadyq); eth_txdone_irq()
829 queue_put_desc(port->plat->txreadyq, phys, desc); eth_txdone_irq()
843 unsigned int txreadyq = port->plat->txreadyq; eth_xmit() local
887 n = queue_get_desc(txreadyq, port, 1); eth_xmit()
903 if (qmgr_stat_below_low_watermark(txreadyq)) { /* empty */ eth_xmit()
910 if (!qmgr_stat_below_low_watermark(txreadyq)) { eth_xmit()
1084 err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0, request_queues()
1099 qmgr_release_queue(port->plat->txreadyq); request_queues()
1116 qmgr_release_queue(port->plat->txreadyq); release_queues()
1278 queue_put_desc(port->plat->txreadyq, eth_open()
1339 int n = queue_get_desc(port->plat->txreadyq, port, 1); eth_close()
1364 while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0) eth_close()
/linux-4.4.14/drivers/net/wan/
H A Dixp4xx_hss.c817 start = qmgr_stat_below_low_watermark(port->plat->txreadyq); hss_hdlc_txdone_irq()
818 queue_put_desc(port->plat->txreadyq, hss_hdlc_txdone_irq()
833 unsigned int txreadyq = port->plat->txreadyq; hss_hdlc_xmit() local
879 n = queue_get_desc(txreadyq, port, 1); hss_hdlc_xmit()
894 if (qmgr_stat_below_low_watermark(txreadyq)) { /* empty */ hss_hdlc_xmit()
900 if (!qmgr_stat_below_low_watermark(txreadyq)) { hss_hdlc_xmit()
935 err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0, request_hdlc_queues()
947 qmgr_release_queue(port->plat->txreadyq); request_hdlc_queues()
965 qmgr_release_queue(port->plat->txreadyq); release_hdlc_queues()
1073 queue_put_desc(port->plat->txreadyq, hss_hdlc_open()
1140 while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0) hss_hdlc_close()

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