Home
last modified time | relevance | path

Searched refs:txdctl (Results 1 – 9 of 9) sorted by relevance

/linux-4.4.14/drivers/net/ethernet/intel/fm10k/
Dfm10k_common.c492 u32 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(0)); in fm10k_get_host_state_generic() local
498 if (!(~txdctl) || !(txdctl & FM10K_TXDCTL_ENABLE)) in fm10k_get_host_state_generic()
502 if (!mac->get_host_state || !(~txdctl)) in fm10k_get_host_state_generic()
506 if (hw->mac.tx_ready && !(txdctl & FM10K_TXDCTL_ENABLE)) { in fm10k_get_host_state_generic()
Dfm10k_pf.c841 u32 msg[4], txdctl, txqctl, tdbal = 0, tdbah = 0; in fm10k_iov_assign_default_mac_vlan_pf() local
878 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx)); in fm10k_iov_assign_default_mac_vlan_pf()
879 for (timeout = 0; txdctl & FM10K_TXDCTL_ENABLE; timeout++) { in fm10k_iov_assign_default_mac_vlan_pf()
887 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx)); in fm10k_iov_assign_default_mac_vlan_pf()
Dfm10k_pci.c545 u32 txdctl = FM10K_TXDCTL_ENABLE | (1 << FM10K_TXDCTL_MAX_TIME_SHIFT); in fm10k_configure_tx_ring() local
583 fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl); in fm10k_configure_tx_ring()
598 u32 txdctl; in fm10k_enable_tx_ring() local
608 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)); in fm10k_enable_tx_ring()
609 } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop); in fm10k_enable_tx_ring()
/linux-4.4.14/drivers/net/ethernet/intel/igbvf/
Dnetdev.c1289 u32 txdctl, dca_txctrl; in igbvf_configure_tx() local
1292 txdctl = er32(TXDCTL(0)); in igbvf_configure_tx()
1293 ew32(TXDCTL(0), txdctl & ~E1000_TXDCTL_QUEUE_ENABLE); in igbvf_configure_tx()
1316 txdctl |= E1000_TXDCTL_QUEUE_ENABLE; in igbvf_configure_tx()
1317 ew32(TXDCTL(0), txdctl); in igbvf_configure_tx()
1512 u32 rxdctl, txdctl; in igbvf_down() local
1527 txdctl = er32(TXDCTL(0)); in igbvf_down()
1528 ew32(TXDCTL(0), txdctl & ~E1000_TXDCTL_QUEUE_ENABLE); in igbvf_down()
/linux-4.4.14/drivers/net/ethernet/intel/e1000e/
Dich8lan.c4711 u32 ctrl_ext, txdctl, snoop; in e1000_init_hw_ich8lan() local
4748 txdctl = er32(TXDCTL(0)); in e1000_init_hw_ich8lan()
4749 txdctl = ((txdctl & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw_ich8lan()
4751 txdctl = ((txdctl & ~E1000_TXDCTL_PTHRESH) | in e1000_init_hw_ich8lan()
4753 ew32(TXDCTL(0), txdctl); in e1000_init_hw_ich8lan()
4754 txdctl = er32(TXDCTL(1)); in e1000_init_hw_ich8lan()
4755 txdctl = ((txdctl & ~E1000_TXDCTL_WTHRESH) | in e1000_init_hw_ich8lan()
4757 txdctl = ((txdctl & ~E1000_TXDCTL_PTHRESH) | in e1000_init_hw_ich8lan()
4759 ew32(TXDCTL(1), txdctl); in e1000_init_hw_ich8lan()
Dnetdev.c2957 u32 txdctl = er32(TXDCTL(0)); in e1000_configure_tx() local
2959 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | in e1000_configure_tx()
2970 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; in e1000_configure_tx()
2971 ew32(TXDCTL(0), txdctl); in e1000_configure_tx()
/linux-4.4.14/drivers/net/ethernet/intel/ixgbevf/
Dixgbevf_main.c1550 u32 txdctl = IXGBE_TXDCTL_ENABLE; in ixgbevf_configure_tx_ring() local
1584 txdctl |= (8 << 16); /* WTHRESH = 8 */ in ixgbevf_configure_tx_ring()
1587 txdctl |= (1 << 8) | /* HTHRESH = 1 */ in ixgbevf_configure_tx_ring()
1592 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl); in ixgbevf_configure_tx_ring()
1597 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx)); in ixgbevf_configure_tx_ring()
1598 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); in ixgbevf_configure_tx_ring()
/linux-4.4.14/drivers/net/ethernet/intel/igb/
Digb_main.c3270 u32 txdctl = 0; in igb_configure_tx_ring() local
3289 txdctl |= IGB_TX_PTHRESH; in igb_configure_tx_ring()
3290 txdctl |= IGB_TX_HTHRESH << 8; in igb_configure_tx_ring()
3291 txdctl |= IGB_TX_WTHRESH << 16; in igb_configure_tx_ring()
3293 txdctl |= E1000_TXDCTL_QUEUE_ENABLE; in igb_configure_tx_ring()
3294 wr32(E1000_TXDCTL(reg_idx), txdctl); in igb_configure_tx_ring()
/linux-4.4.14/drivers/net/ethernet/intel/ixgbe/
Dixgbe_main.c3081 u32 txdctl = IXGBE_TXDCTL_ENABLE; in ixgbe_configure_tx_ring() local
3108 txdctl |= (1 << 16); /* WTHRESH = 1 */ in ixgbe_configure_tx_ring()
3110 txdctl |= (8 << 16); /* WTHRESH = 8 */ in ixgbe_configure_tx_ring()
3116 txdctl |= (1 << 8) | /* HTHRESH = 1 */ in ixgbe_configure_tx_ring()
3141 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl); in ixgbe_configure_tx_ring()
3151 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); in ixgbe_configure_tx_ring()
3152 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); in ixgbe_configure_tx_ring()