Searched refs:trap (Results 1 - 200 of 607) sorted by relevance

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/linux-4.4.14/arch/m68k/68000/
H A Dromvec.S15 .global trap
21 .long CONFIG_RAMBASE+CONFIG_RAMSIZE-4, _start, buserr, trap
22 .long trap, trap, trap, trap
23 .long trap, trap, trap, trap
24 .long trap, trap, trap, trap
25 .long trap, trap, trap, trap
26 .long trap, trap, trap, trap
27 .long trap, trap, trap, trap
28 .long trap, trap, trap, trap
30 .long system_call, trap, trap, trap
31 .long trap, trap, trap, trap
32 .long trap, trap, trap, trap
33 .long trap, trap, trap, trap
/linux-4.4.14/arch/frv/kernel/
H A Dentry-table.S1 /* entry-table.S: main trap vector tables and exception jump table
19 # Declare the main trap and vector tables
23 # (1) The trap table for debug mode
24 # (2) The trap table for kernel mode
25 # (3) The trap table for user mode
35 # The user and kernel trap tables use the same prologue for normal
39 # (5) The fixup table for kernel-trap single-step
40 # (6) The fixup table for user-trap single-step
47 # The linker script places the user mode and kernel mode trap tables on to
53 # trap table for entry from debug mode
54 .section .trap.break,"ax"
59 # trap table for entry from user mode
60 .section .trap.user,"ax"
65 # trap table for entry from kernel mode
66 .section .trap.kernel,"ax"
72 .section .trap.vector,"ax"
77 # trap fixup table for single-stepping in user mode
78 .section .trap.fixup.user,"a"
83 # trap fixup table for single-stepping in user mode
84 .section .trap.fixup.kernel,"a"
91 .section .trap.user
94 .section .trap.fixup.user
97 .section .trap.kernel
100 .section .trap.fixup.kernel
103 .section .trap.vector
110 .section .trap.user
113 .section .trap.fixup.user
116 .section .trap.kernel
121 .section .trap.fixup.kernel
124 .section .trap.vector
131 .section .trap.user
137 .section .trap.kernel
143 .section .trap.vector
178 .section .trap.user
195 .section .trap.kernel
212 .section .trap.fixup.user
222 .section .trap.fixup.kernel
232 .section .trap.vector
259 .section .trap.user
269 .section .trap.fixup.user
278 .section .trap.kernel
284 # trap #2 in kernel - reenable interrupts
298 .section .trap.fixup.kernel
310 .section .trap.break
316 .section .trap.vector
H A Dvmlinux.lds.S45 .trap : {
46 /* trap table management - read entry-table.S before modifying */
49 *(.trap.user)
50 *(.trap.kernel)
52 *(.trap.break)
82 *(.trap.vector)
86 *(.trap.fixup.user .trap.fixup.kernel)
H A Dbreak.S188 # - there is a fixup table that has a pointer for every 16b slot in the trap
195 # external interrupts seem to escape from the trap table before single
237 # access the fixup table - there's a 1:1 mapping between the slots in the trap tables and
238 # the slots in the trap fixup tables allowing us to simply divide the offset into the
334 # we stepped through into the virtual interrupt reenablement trap
356 # return to where the trap happened
412 # we'll want to try the trap stub again
457 # we'll want to try the trap stub again
466 # we'll want to try the trap stub again
475 # we'll want to try the trap stub again
547 # fudge PSR.PS and BPSR.BS to return to kernel mode through the trap
548 # table as trap 126
659 # trap exceptions during break handling and disable h/w breakpoints/watchpoints
767 # GDB stub BUG() trap
H A Ddebug-stub.c125 /* enable the debug events we want to trap */ debug_stub_init()
140 * kernel "exit" trap for gdb stub
/linux-4.4.14/arch/m68k/68360/
H A Dints.c31 asmlinkage void trap(void);
67 _ramvec[3] = trap; trap_init()
68 _ramvec[4] = trap; trap_init()
69 _ramvec[5] = trap; trap_init()
70 _ramvec[6] = trap; trap_init()
71 _ramvec[7] = trap; trap_init()
72 _ramvec[8] = trap; trap_init()
73 _ramvec[9] = trap; trap_init()
74 _ramvec[10] = trap; trap_init()
75 _ramvec[11] = trap; trap_init()
76 _ramvec[12] = trap; trap_init()
77 _ramvec[13] = trap; trap_init()
78 _ramvec[14] = trap; trap_init()
79 _ramvec[15] = trap; trap_init()
82 _ramvec[33] = trap; trap_init()
H A Dhead-ram.S286 .long trap /* Address Error - 3. */
287 .long trap /* Illegal Instruction - 4. */
288 .long trap /* Divide by zero - 5. */
289 .long trap /* CHK, CHK2 Instructions - 6. */
290 .long trap /* TRAPcc, TRAPV Instructions - 7. */
291 .long trap /* Privilege Violation - 8. */
292 .long trap /* Trace - 9. */
293 .long trap /* Line 1010 Emulator - 10. */
294 .long trap /* Line 1111 Emualtor - 11. */
295 .long trap /* Harware Breakpoint - 12. */
296 .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */
297 .long trap /* Format Error - 14. */
298 .long trap /* Uninitialized Interrupt - 15. */
299 .long trap /* (Unassigned, Reserver) - 16. */
300 .long trap /* (Unassigned, Reserver) - 17. */
301 .long trap /* (Unassigned, Reserver) - 18. */
302 .long trap /* (Unassigned, Reserver) - 19. */
303 .long trap /* (Unassigned, Reserver) - 20. */
304 .long trap /* (Unassigned, Reserver) - 21. */
305 .long trap /* (Unassigned, Reserver) - 22. */
306 .long trap /* (Unassigned, Reserver) - 23. */
307 .long trap /* Spurious Interrupt - 24. */
308 .long trap /* Level 1 Interrupt Autovector - 25. */
309 .long trap /* Level 2 Interrupt Autovector - 26. */
310 .long trap /* Level 3 Interrupt Autovector - 27. */
311 .long trap /* Level 4 Interrupt Autovector - 28. */
312 .long trap /* Level 5 Interrupt Autovector - 29. */
313 .long trap /* Level 6 Interrupt Autovector - 30. */
314 .long trap /* Level 7 Interrupt Autovector - 31. */
316 .long trap /* Trap Instruction Vectors 1 - 33. */
317 .long trap /* Trap Instruction Vectors 2 - 34. */
318 .long trap /* Trap Instruction Vectors 3 - 35. */
319 .long trap /* Trap Instruction Vectors 4 - 36. */
320 .long trap /* Trap Instruction Vectors 5 - 37. */
321 .long trap /* Trap Instruction Vectors 6 - 38. */
322 .long trap /* Trap Instruction Vectors 7 - 39. */
323 .long trap /* Trap Instruction Vectors 8 - 40. */
324 .long trap /* Trap Instruction Vectors 9 - 41. */
325 .long trap /* Trap Instruction Vectors 10 - 42. */
326 .long trap /* Trap Instruction Vectors 11 - 43. */
327 .long trap /* Trap Instruction Vectors 12 - 44. */
328 .long trap /* Trap Instruction Vectors 13 - 45. */
329 .long trap /* Trap Instruction Vectors 14 - 46. */
330 .long trap /* Trap Instruction Vectors 15 - 47. */
H A Dhead-rom.S297 .long trap /* Address Error - 3. */
298 .long trap /* Illegal Instruction - 4. */
299 .long trap /* Divide by zero - 5. */
300 .long trap /* CHK, CHK2 Instructions - 6. */
301 .long trap /* TRAPcc, TRAPV Instructions - 7. */
302 .long trap /* Privilege Violation - 8. */
303 .long trap /* Trace - 9. */
304 .long trap /* Line 1010 Emulator - 10. */
305 .long trap /* Line 1111 Emualtor - 11. */
306 .long trap /* Harware Breakpoint - 12. */
307 .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */
308 .long trap /* Format Error - 14. */
309 .long trap /* Uninitialized Interrupt - 15. */
310 .long trap /* (Unassigned, Reserver) - 16. */
311 .long trap /* (Unassigned, Reserver) - 17. */
312 .long trap /* (Unassigned, Reserver) - 18. */
313 .long trap /* (Unassigned, Reserver) - 19. */
314 .long trap /* (Unassigned, Reserver) - 20. */
315 .long trap /* (Unassigned, Reserver) - 21. */
316 .long trap /* (Unassigned, Reserver) - 22. */
317 .long trap /* (Unassigned, Reserver) - 23. */
318 .long trap /* Spurious Interrupt - 24. */
319 .long trap /* Level 1 Interrupt Autovector - 25. */
320 .long trap /* Level 2 Interrupt Autovector - 26. */
321 .long trap /* Level 3 Interrupt Autovector - 27. */
322 .long trap /* Level 4 Interrupt Autovector - 28. */
323 .long trap /* Level 5 Interrupt Autovector - 29. */
324 .long trap /* Level 6 Interrupt Autovector - 30. */
325 .long trap /* Level 7 Interrupt Autovector - 31. */
327 .long trap /* Trap Instruction Vectors 1 - 33. */
328 .long trap /* Trap Instruction Vectors 2 - 34. */
329 .long trap /* Trap Instruction Vectors 3 - 35. */
330 .long trap /* Trap Instruction Vectors 4 - 36. */
331 .long trap /* Trap Instruction Vectors 5 - 37. */
332 .long trap /* Trap Instruction Vectors 6 - 38. */
333 .long trap /* Trap Instruction Vectors 7 - 39. */
334 .long trap /* Trap Instruction Vectors 8 - 40. */
335 .long trap /* Trap Instruction Vectors 9 - 41. */
336 .long trap /* Trap Instruction Vectors 10 - 42. */
337 .long trap /* Trap Instruction Vectors 11 - 43. */
338 .long trap /* Trap Instruction Vectors 12 - 44. */
339 .long trap /* Trap Instruction Vectors 13 - 45. */
340 .long trap /* Trap Instruction Vectors 14 - 46. */
341 .long trap /* Trap Instruction Vectors 15 - 47. */
/linux-4.4.14/arch/m68k/coldfire/
H A Dvectors.c4 * vectors.c -- high level trap setup for ColdFire
38 asmlinkage void trap(void);
47 * There is a common trap handler and common interrupt trap_init()
53 _ramvec[i] = trap; trap_init()
55 _ramvec[i] = trap; trap_init()
/linux-4.4.14/arch/ia64/include/uapi/asm/
H A Dfpu.h12 #define FPSR_TRAP_VD (1 << 0) /* invalid op trap disabled */
13 #define FPSR_TRAP_DD (1 << 1) /* denormal trap disabled */
14 #define FPSR_TRAP_ZD (1 << 2) /* zero-divide trap disabled */
15 #define FPSR_TRAP_OD (1 << 3) /* overflow trap disabled */
16 #define FPSR_TRAP_UD (1 << 4) /* underflow trap disabled */
17 #define FPSR_TRAP_ID (1 << 5) /* inexact trap disabled */
28 #define FPSF_TD (1 << 6) /* trap disabled */
/linux-4.4.14/arch/arm/include/asm/
H A Dhw_irq.h11 pr_crit("unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
H A Dkgdb.h19 * debug trap. When an SWI occurs, the next instruction addr is
20 * placed into R14_svc before jumping to the vector trap.
25 * By doing this as an undefined instruction trap, we force a mode
32 * Note to ARM HW designers: Add real trap support like SH && PPC to
H A Dbug.h69 unsigned long err, unsigned long trap);
/linux-4.4.14/arch/sparc/include/asm/
H A Destate.h13 /* UCEEN enables the fast_ECC_error trap for: 1) software correctable E-cache
29 * generate a disrupting ECC_error trap.
31 * of the 3 trap types.
37 /* CEEN enables the ECC_error trap for hardware corrected ECC errors. System bus
39 * ECC_error disrupting trap with this bit enabled.
41 * This same trap will also be generated when a hardware corrected ECC error results
45 /* In general, if the trap enable bits above are disabled the AFSR bits will still
46 * log the events even though the trap will not be generated by the processor.
H A Dhead_32.h8 /* Here are some trap goodies */
10 /* Generic trap entry. */
28 * the same generic system call low-level entry point. The trap table
32 /* Software trap for Linux system calls. */
56 /* The Get Condition Codes software trap for userland. */
60 /* The Set Condition Codes software trap for userland. */
64 /* The Get PSR software trap for userland. */
H A Dtraps.h2 * traps.h: Format of entries for the Sparc trap table.
H A Dkdebug_32.h13 /* Breakpoints are enter through trap table entry 126. So in sparc assembly
38 /* Ok, after you remap yourself and/or change the trap table
H A Dpcr.h44 #define PCR_N4_PICNPT 0x00010000 /* PIC non-privileged trap */
45 #define PCR_N4_PICNHT 0x00020000 /* PIC non-hypervisor trap */
H A Dasmmacro.h9 /* All trap entry points _must_ begin with this macro or else you
H A Dunistd.h6 * before the trap into the system call with gcc 'asm' statements.
H A Dsfafsr.h47 /* The trap handlers for asynchronous errors encode the AFSR and
77 /* The various trap types that report using the above state. */
H A Dpsr.h47 * incur a trap.
H A Dross.h38 * NF: No Fault -- 0 = faults trap the CPU from supervisor mode
72 * an unimplemented 'flush' trap will occur when any
H A Dauxio_32.h13 * that have it (good for testing entry points to trap handlers and irq's)
H A Dbarrier_64.h6 * branch, the chip can stop executing instructions until a trap occurs.
H A Dmbus.h75 /* The CPU ID is encoded in the trap base register, 20 bits to the left of
H A Dhypervisor.h11 * "fast traps" which use software trap 0x80 and encode the function
25 * number in the software trap number itself. So these use trap
43 * defined below. So, for example, if a hyper-fast trap takes
47 * If the hypervisor trap is invalid, or the fast trap function number
143 * the SIR (trap type 0x04) real trap table (RTBA) entry point on one
243 * Start CPU with given CPU ID with PC in %pc and with a real trap
440 * EBADALIGN RTBA is incorrectly aligned for a trap table
442 * Set the real trap base address of the local cpu to the given RTBA.
793 * failure, the previous mmu mode remains and the trap simply returns
899 * error reported via a resumable or non-resumable trap. The second
1117 * across the trap.
1132 * across the trap.
1182 * The hypervisor provides a trap tracing capability for privileged
1184 * round-robin trap trace queue within which the hypervisor writes
1189 * The trap trace control structure is 64-bytes long and placed at the
1190 * start (offset 0) of the trap trace buffer, and is described as
1204 * in the trap-trace buffer. The tail offset is the offset of the
1210 * Each trap trace buffer entry is laid out as follows:
1219 unsigned short tag; /* Extended trap identifier */
1245 #define HV_TRAP_TYPE_HV 0x01 /* Hypervisor trap entry */
1259 * Requests hypervisor trap tracing and declares a virtual CPU's trap
1261 * base address of the trap trace queue and must be 64-byte aligned.
1262 * Specifying a value of 0 for the number of entries disables trap
1264 * sized for a power of two number of 64-byte trap trace entries plus
1268 * relocate a trap trace buffer or create "snapshots" of information.
1270 * If the real address is illegal or badly aligned, then trap tracing
1287 * Returns the size and location of the previously declared trap-trace
1299 * ERRORS: EINVAL No trap trace buffer currently defined
1301 * Enable or disable trap tracing, and return the previous enabled
1315 * ERRORS: EINVAL No trap trace buffer currently defined
1317 * Freeze or unfreeze trap tracing, returning the previous freeze
1332 * ERRORS: EINVAL No trap trace buffer currently defined
1334 * Add an entry to the trap trace buffer. Upon return only ARG0/RET0
/linux-4.4.14/arch/powerpc/include/asm/
H A Dtrace.h149 TP_PROTO(unsigned long addr, unsigned long access, unsigned long trap),
150 TP_ARGS(addr, access, trap),
154 __field(unsigned long, trap)
160 __entry->trap = trap;
163 TP_printk("hash fault with addr 0x%lx and access = 0x%lx trap = 0x%lx",
164 __entry->addr, __entry->access, __entry->trap)
H A Dhardirq.h33 printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
H A Dptrace.h124 * We use the least-significant bit of the trap field to indicate
130 #define FULL_REGS(regs) (((regs)->trap & 1) == 0)
132 #define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
133 #define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0)
134 #define IS_DEBUG_EXC(regs) (((regs)->trap & 8) != 0)
136 #define TRAP(regs) ((regs)->trap & ~0xF)
139 #define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
144 if ((regs)->trap & 1) \
H A Dmmu-hash64.h325 unsigned long vsid, pte_t *ptep, unsigned long trap,
328 unsigned long vsid, pte_t *ptep, unsigned long trap,
331 unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap);
333 unsigned long access, unsigned long trap,
335 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap,
338 pte_t *ptep, unsigned long trap, unsigned long flags,
342 unsigned long vsid, pmd_t *pmdp, unsigned long trap,
347 unsigned long trap, unsigned long flags, __hash_page_thp()
355 unsigned long vsid, unsigned long trap,
345 __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid, pmd_t *pmdp, unsigned long trap, unsigned long flags, int ssize, unsigned int psize) __hash_page_thp() argument
H A Dexception-64s.h20 * PowerPC-64 platform, including trap and interrupt dispatch.
347 std r9,_TRAP(r1); /* set trap number */ \
535 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
539 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
546 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
547 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
555 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
556 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
H A Dbug.h8 * Define an illegal instr to trap on the bug.
H A Dprobes.h26 #define BREAKPOINT_INSTRUCTION 0x7fe00008 /* trap */
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dnv50.c161 u32 trap[6], idx, inst; nv50_fb_intr() local
173 trap[i] = nvkm_rd32(device, 0x100c94); nv50_fb_intr()
180 st0 = (trap[0] & 0x0000000f) >> 0; nv50_fb_intr()
181 st1 = (trap[0] & 0x000000f0) >> 4; nv50_fb_intr()
182 st2 = (trap[0] & 0x00000f00) >> 8; nv50_fb_intr()
183 st3 = (trap[0] & 0x0000f000) >> 12; nv50_fb_intr()
185 st0 = (trap[0] & 0x000000ff) >> 0; nv50_fb_intr()
186 st1 = (trap[0] & 0x0000ff00) >> 8; nv50_fb_intr()
187 st2 = (trap[0] & 0x00ff0000) >> 16; nv50_fb_intr()
188 st3 = (trap[0] & 0xff000000) >> 24; nv50_fb_intr()
190 inst = ((trap[2] << 16) | trap[1]) << 12; nv50_fb_intr()
203 (trap[5] & 0x00000100) ? "read" : "write", nv50_fb_intr()
204 trap[5] & 0xff, trap[4] & 0xffff, trap[3] & 0xffff, nv50_fb_intr()
227 nvkm_wr32(device, 0x100c90, fb->func->trap); nv50_fb_init()
282 .trap = 0x000707ff,
H A Dnv50.h15 u32 trap; member in struct:nv50_fb_func
H A Dg84.c30 .trap = 0x001d07ff,
H A Dgt215.c30 .trap = 0x000d0fff,
H A Dmcp77.c30 .trap = 0x001d07ff,
H A Dmcp89.c30 .trap = 0x089d1fff,
/linux-4.4.14/include/asm-generic/
H A Dhardirq.h17 printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
/linux-4.4.14/arch/s390/include/asm/
H A Dhardirq.h23 printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
H A Dptrace.h110 unsigned short perc_atmid; /* PER trap ATMID */
111 unsigned long address; /* PER trap instruction address */
112 unsigned char access_id; /* PER trap access identification */
/linux-4.4.14/arch/m68k/include/asm/
H A Dhardirq.h12 pr_crit("unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
H A Dbootstd.h52 __asm__ __volatile__ ("trap #2" \
64 __asm__ __volatile__ ("trap #2" \
77 __asm__ __volatile__ ("trap #2" \
91 __asm__ __volatile__ ("trap #2" \
107 __asm__ __volatile__ ("trap #2" \
124 __asm__ __volatile__ ("trap #2" \
/linux-4.4.14/include/linux/
H A Dkdebug.h20 struct pt_regs *regs, long err, int trap, int sig);
H A Dlguest_launcher.h29 LHREQ_TRAP, /* + trap number to deliver to guest. */
33 * This is what read() of the lguest fd populates. trap ==
36 * the trap address, insn is the instruction), or 13 for a GPF
40 __u8 trap; member in struct:lguest_pending
H A Dkdb.h145 KDB_REASON_ENTER = 1, /* KDB_ENTER() trap/fault - regs valid */
146 KDB_REASON_ENTER_SLAVE, /* KDB_ENTER_SLAVE() trap/fault - regs valid */
155 KDB_REASON_SSTEP, /* Single Step trap. - regs valid */
/linux-4.4.14/arch/m68k/ifpsp060/
H A Dfskeleton.S83 bral trap | jump to trap handler
102 bral trap | jump to trap handler
121 bral trap | jump to trap handler
140 bral trap | jump to trap handler
159 bral trap | jump to trap handler
178 bral trap | jump to trap handler
200 bral trap | jump to trap handler
214 bral trap | jump to trap handler
246 | discovers that the trap condition is true and it should branch to the operating
247 | system handler for the trap exception vector number 7.
253 bral trap | jump to trap handler
H A Diskeleton.S114 bral trap | jump to trap handler
154 bral trap | jump to trap handler
/linux-4.4.14/arch/sparc/kernel/
H A Detrap_32.S2 * etrap.S: Sparc trap window preparation for entry into the
44 /* At trap time, interrupts and all generic traps do the
52 * Then 'some_handler' if it needs a trap frame (ie. it has
53 * to call c-code and the trap cannot be handled in-window)
65 * O == Current window before trap
66 * T == Window entered when trap occurred
70 * %l0 contains trap time %psr, %l1 and %l2 contain the
71 * trap pc and npc, and %l3 contains the trap time %wim.
78 /* Calculate mask of trap window. See if from user
87 * build a pt_regs trap frame.
92 /* See if we are in the trap window. */
94 bne trap_setup_kernel_spill ! in trap window, clean up
160 /* See if we are in the trap window. */
163 orn %g0, %t_twinmask, %g1 ! negate trap win mask into %g1
167 * any window from the %wim at trap time until
177 * the trap occurred, window T is the trap window
H A Dwof.S28 * accessed when in the 'trap' window, 'G' means
31 * from the trap.
33 #define t_psr l0 /* %psr at trap time T */
34 #define t_pc l1 /* PC for trap return T */
35 #define t_npc l2 /* NPC for trap return T */
36 #define t_wim l3 /* %wim at trap time T */
42 #define twin_tmp l4 /* Temp reg, only usable in trap window T */
57 /* The trap entry point has done the following:
79 * window properly in this trap handler.
88 /* The trap entry point has set the condition codes
116 restore %g0, %g0, %g0 ! go back into trap window
123 jmp %t_pc ! Return from trap
131 * are approaching the infamous register window trap handling
138 * a trap (traps are off, we'd get a watchdog wheee)...
178 restore %g0, %g0, %g0 /* Back to trap window. */
220 /* Back in the trap window, update winbuffer save count. */
225 * doing is taking two windows, the invalid one at trap
257 /* Return from trap if C-code actually fixes things, if it
267 /* The kernel provoked a spill window trap, but the window we
279 * return from trap. Note, restoring %g6 when returning
H A Dspiterrs.S105 /* This is the trap handler entry point for ECC correctable
106 * errors. They are corrected, but we listen for the trap so
114 * As far as I can make out from the manual, the CEE trap is
118 * The code below is only for trap level 1 CEE events, as it
120 * For trap level >1 we just clear the CE bit in the AFSR and
129 * case by inspecting the trap type.
166 cmp %g3, 0x80 ! first win spill/fill trap
168 cmp %g3, 0xff ! last win spill/fill trap
H A Dwuf.S2 * wuf.S: Window underflow trap handler for the Sparc.
35 /* The trap entry point has executed the following:
50 * trap take a look at this diagram:
59 * T == the trap itself has save'd us into this
67 * are done and return from trap if successful
119 * return from trap. This is the simplest case of all.
144 * to the trap window and call c-code to deal with this.
178 /* re-set trap time %wim value */
206 /* Where she'll trap nobody knows... */
H A Dcherrs.S1 /* These get patched into the trap table at boot time
174 * jump to interrupt globals. If some trap level above us
181 rdpr %tl, %g1 ! Save original trap level
184 1: wrpr %g2, %tl ! Set trap level to check
188 wrpr %g1, %tl ! Restore original trap level
189 add %g2, 1, %g2 ! Next trap level
193 wrpr %g1, %tl ! Restore original trap level
232 rdpr %tl, %g1 ! Save original trap level
235 1: wrpr %g2, %tl ! Set trap level to check
239 wrpr %g1, %tl ! Restore original trap level
240 add %g2, 1, %g2 ! Next trap level
244 wrpr %g1, %tl ! Restore original trap level
309 /* Get log entry pointer for this cpu at this trap level. */
458 /* Cheetah FECC trap handling, we get here from tl{0,1}_fecc
459 * in the trap table. That code has done a memory barrier
466 * %g1 is one if this trap occurred at %tl >= 1.
H A Dkstack.h35 /* Does "regs" point to a valid pt_regs trap frame? */ kstack_is_trap_frame()
H A Dunaligned_32.c2 * unaligned.c: Unaligned load/store trap handling with special
58 printk("Impossible unaligned trap. insn=%08x\n", insn); decode_access_size()
245 printk("Unsupported unaligned load/store trap for kernel at <%08lx>.\n", kernel_unaligned_trap()
266 panic("Impossible kernel unaligned trap."); kernel_unaligned_trap()
367 unaligned_panic("Impossible user unaligned trap."); user_unaligned_trap()
H A Dtraps_64.c52 /* When an irrecoverable trap occurs at tl > 0, the trap entry
53 * code logs the trap state registers at every level in the trap
71 printk(KERN_EMERG "TRAPLOG: Error at trap level 0x%lx, " dump_tl1_traplog()
91 if (notify_die(DIE_TRAP, "bad trap", regs, bad_trap()
96 sprintf(buffer, "Bad hw trap %lx at tl0\n", lvl); bad_trap()
102 sprintf(buffer, "Kernel bad sw trap %lx", lvl); bad_trap()
121 if (notify_die(DIE_TRAP_TL1, "bad trap tl1", regs, bad_trap_tl1()
127 sprintf (buffer, "Bad trap %lx at tl>0", lvl); bad_trap_tl1()
487 * trap. spitfire_cee_log()
492 /* The Correctable ECC Error trap does not disable I/D caches. So spitfire_cee_log()
513 * trap. spitfire_ue_log()
571 /* Handle the case where we took a CEE trap, but ACK'd spitfire_access_error()
616 /* Cheetah error trap handling. */
869 /* Now allocate error trap reporting scoreboard. */ cheetah_ecache_flush_init()
884 /* Mark all AFSRs as invalid so that the trap handler will cheetah_ecache_flush_init()
903 /* Now patch trap tables. */ cheetah_ecache_flush_init()
1145 printk("%s" "ERROR(%d): Cheetah error trap taken afsr[%016lx] afar[%016lx] TL1(%d)\n", cheetah_log_errors()
1302 /* If the current trap snapshot does not match what the cheetah_fecc_handler()
1303 * trap handler passed along into our args, big trouble. cheetah_fecc_handler()
1337 /* Decide if we can continue after handling this trap and cheetah_fecc_handler()
1362 panic("Irrecoverable Fast-ECC error trap.\n"); cheetah_fecc_handler()
1364 /* Flush E-cache to kick the error trap handlers out. */ cheetah_fecc_handler()
1460 /* If the current trap snapshot does not match what the cheetah_cee_handler()
1461 * trap handler passed along into our args, big trouble. cheetah_cee_handler()
1526 /* Decide if we can continue after handling this trap and cheetah_cee_handler()
1540 panic("Irrecoverable Correctable-ECC error trap.\n"); cheetah_cee_handler()
1595 /* If the current trap snapshot does not match what the cheetah_deferred_handler()
1596 * trap handler passed along into our args, big trouble. cheetah_deferred_handler()
1654 /* Decide if we can continue after handling this trap and cheetah_deferred_handler()
1727 panic("Irrecoverable deferred error trap.\n"); cheetah_deferred_handler()
1730 /* Handle a D/I cache parity error trap. TYPE is encoded as:
2250 die_if_kernel("Penguin overflow trap from kernel mode", regs); do_tof()
2473 * instruction trap and do not set the FP Trap do_illegal_instruction()
H A Dtraps_32.c102 die_if_kernel("Kernel bad trap", regs); do_hw_interrupt()
185 die_if_kernel("Kernel gets FloatingPenguinUnit disabled trap", regs); do_fpd_trap()
255 /* switch on the contents of the ftt [floating point trap type] field */
277 /* If we successfully emulated the FPop, we pretend the trap never happened :-> */
335 die_if_kernel("Penguin overflow trap from kernel mode", regs); handle_tag_overflow()
352 panic("Tell me what a watchpoint trap is, and I'll then deal " handle_watchpoint()
H A Dentry.S1 /* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
193 /* Bad trap handler */
203 mov %l7, %o1 ! trap number
677 /* Advance over the trap instruction. */
692 /* Advance over the trap instruction. */
700 /* The getcc software trap. The user wants the condition codes from
709 jmp %l2 ! advance over trap instruction
712 /* The setcc software trap. The user has condition codes in %g1
729 jmp %l2 ! advance over trap instruction
1085 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1126 * above we could trap on the fsr store so our low level fpu trap
1310 * sometimes does not go away quickly and we trap again.
H A Dtrampoline_32.S108 /* Set tbr - we use just one trap table. */
167 /* Set tbr - we use just one trap table. */
H A Dwinfixup.S18 * done by the trap entry and exit code. They now do the
37 /* Be very careful about usage of the trap globals here.
H A Dsun4v_ivec.S202 /* Return from trap. */
211 * the head equal to the tail. We'll just trap again otherwise.
313 /* Return from trap. */
322 * the head equal to the tail. We'll just trap again otherwise.
H A Dsun4v_tlb_miss.S68 * I-TLB and return from trap.
111 * D-TLB and return from trap.
149 /* Called from trap table:
161 /* Called from trap table:
H A Drtrap_32.S2 * rtrap.S: Return from Sparc trap low-level code.
112 * set we can return from trap safely.
183 be 1f ! Nope, just return from the trap
H A Dtrampoline_64.S275 * trap table, must be done with extreme care. We cannot
278 * per-cpu area) until we properly take over the trap table
289 /* Put garbage in these registers to trap any access to them. */
H A Dtsb.S140 * allocated, setup a trap stack and call hugetlb_setup()
141 * to do so, then return from the trap to replay the TLB
189 /* Finally, load TLB and return from trap. */
302 ba,pt %xcc, etrap ! Save trap state
H A Duna_asm_32.S1 /* una_asm.S: Kernel unaligned trap assembler helpers.
H A Duna_asm_64.S1 /* una_asm.S: Kernel unaligned trap assembler helpers.
/linux-4.4.14/arch/x86/kernel/cpu/
H A Dmkcapflags.sh49 trap 'rm "$OUT"' EXIT
64 trap - EXIT
/linux-4.4.14/arch/x86/kernel/fpu/
H A Dbugs.c16 * the XMM trap handlers basically had to
17 * be buggy. So let's have a correct XMM trap
/linux-4.4.14/arch/sparc/include/uapi/asm/
H A Dtraps.h2 * traps.h: Format of entries for the Sparc trap table.
15 /* For patching the trap table at boot time, we need to know how to
22 * are branching to. This is the case for a trap vector...
32 /* Various interesting trap levels. */
74 #define SP_TRAP_SDIVZ 0x82 /* Software Divide-by-Zero trap */
99 /* Is this a trap we never expect to get? */
108 /* Is this a Hardware trap? */
111 /* Is this a Software trap? */
H A Dptrace.h29 * with the %tt (trap type) register value at trap
31 * accurately a trap stack frame in the stack
/linux-4.4.14/arch/mips/
H A DMakefile132 cflags-$(CONFIG_CPU_R6000) += -march=r6000 -Wa,--trap
133 cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
134 cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
135 cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
136 cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
138 -Wa,-mips32 -Wa,--trap
140 -Wa,-mips32r2 -Wa,--trap
141 cflags-$(CONFIG_CPU_MIPS32_R6) += -march=mips32r6 -Wa,--trap
143 -Wa,-mips64 -Wa,--trap
145 -Wa,-mips64r2 -Wa,--trap
146 cflags-$(CONFIG_CPU_MIPS64_R6) += -march=mips64r6 -Wa,--trap
147 cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
149 -Wa,--trap
151 -Wa,--trap
153 -Wa,--trap
155 -Wa,--trap
157 -Wa,--trap
160 cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
162 -Wa,--trap
163 cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += $(call cc-option,-march=octeon) -Wa,--trap
168 cflags-$(CONFIG_CPU_BMIPS) += -march=mips32 -Wa,-mips32 -Wa,--trap
178 -Wa,-mips64r2 -Wa,--trap
/linux-4.4.14/arch/x86/include/uapi/asm/
H A Ddebugreg.h6 debug registers. Registers 0-3 contain the addresses we wish to trap on */
14 which debugging register was responsible for the trap. The other bits
32 and indicates what types of access we trap on, and how large the data
38 #define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */
42 #define DR_LEN_1 (0x0) /* Settings for data length to trap on */
/linux-4.4.14/arch/s390/kernel/
H A Dcompat_ptrace.h14 __u16 perc_atmid; /* PER trap ATMID */
15 __u32 address; /* PER trap instruction address */
16 __u8 access_id; /* PER trap access identification */
/linux-4.4.14/arch/unicore32/include/asm/
H A Dbug.h20 struct siginfo *info, unsigned long err, unsigned long trap);
H A Dfpu-ucf64.h31 /* trap enable */
/linux-4.4.14/arch/mips/include/asm/
H A Dkgdb.h40 struct pt_regs *regs, long err, int trap, int sig);
/linux-4.4.14/arch/sh/kernel/
H A Ddebugtraps.S4 * Debug trap jump tables for SuperH
H A Dtraps.c125 * Generic trap handler.
134 if (notify_die(DIE_TRAP, "debug trap", regs, 0, vec & 0xff, BUILD_TRAP_HANDLER()
151 if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff, BUILD_TRAP_HANDLER()
H A Dsh_bios.c70 * through which debug and BIOS traps are delegated by the Linux trap
84 printk(KERN_NOTICE "Setting GDB trap vector to %p\n", sh_bios_vbr_init()
H A Dentry-common.S242 * The main debug trap handler.
244 * r8=TRA (not the trap number!)
330 * Check the trap type
334 bt/s debug_trap ! it's a debug trap..
/linux-4.4.14/arch/blackfin/include/uapi/asm/
H A Dsiginfo.h34 #define TRAP_ILLTRAP (__SI_FAULT|4) /* illegal trap ************* */
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dgf100.c860 u32 trap[4]; gf100_gr_trap_gpc_rop() local
862 trap[0] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0420)) & 0x3fffffff; gf100_gr_trap_gpc_rop()
863 trap[1] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0434)); gf100_gr_trap_gpc_rop()
864 trap[2] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0438)); gf100_gr_trap_gpc_rop()
865 trap[3] = nvkm_rd32(device, GPC_UNIT(gpc, 0x043c)); gf100_gr_trap_gpc_rop()
867 nvkm_snprintbf(error, sizeof(error), gf100_gpc_rop_error, trap[0]); gf100_gr_trap_gpc_rop()
869 nvkm_error(subdev, "GPC%d/PROP trap: %08x [%s] x = %u, y = %u, " gf100_gr_trap_gpc_rop()
871 gpc, trap[0], error, trap[1] & 0xffff, trap[1] >> 16, gf100_gr_trap_gpc_rop()
872 (trap[2] >> 8) & 0x3f, trap[3] & 0xff); gf100_gr_trap_gpc_rop()
909 nvkm_error(subdev, "GPC%i/TPC%i/MP trap: " gf100_gr_trap_mp()
925 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0224)); gf100_gr_trap_tpc() local
926 nvkm_error(subdev, "GPC%d/TPC%d/TEX: %08x\n", gpc, tpc, trap); gf100_gr_trap_tpc()
937 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0084)); gf100_gr_trap_tpc() local
938 nvkm_error(subdev, "GPC%d/TPC%d/POLY: %08x\n", gpc, tpc, trap); gf100_gr_trap_tpc()
944 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x048c)); gf100_gr_trap_tpc() local
945 nvkm_error(subdev, "GPC%d/TPC%d/L1C: %08x\n", gpc, tpc, trap); gf100_gr_trap_tpc()
969 u32 trap = nvkm_rd32(device, GPC_UNIT(gpc, 0x0900)); gf100_gr_trap_gpc() local
970 nvkm_error(subdev, "GPC%d/ZCULL: %08x\n", gpc, trap); gf100_gr_trap_gpc()
976 u32 trap = nvkm_rd32(device, GPC_UNIT(gpc, 0x1028)); gf100_gr_trap_gpc() local
977 nvkm_error(subdev, "GPC%d/CCACHE: %08x\n", gpc, trap); gf100_gr_trap_gpc()
983 u32 trap = nvkm_rd32(device, GPC_UNIT(gpc, 0x0824)); gf100_gr_trap_gpc() local
984 nvkm_error(subdev, "GPC%d/ESETUP: %08x\n", gpc, trap); gf100_gr_trap_gpc()
1008 u32 trap = nvkm_rd32(device, 0x400108); gf100_gr_trap_intr() local
1011 if (trap & 0x00000001) { gf100_gr_trap_intr()
1016 trap &= ~0x00000001; gf100_gr_trap_intr()
1019 if (trap & 0x00000002) { gf100_gr_trap_intr()
1024 trap &= ~0x00000002; gf100_gr_trap_intr()
1027 if (trap & 0x00000008) { gf100_gr_trap_intr()
1032 trap &= ~0x00000008; gf100_gr_trap_intr()
1035 if (trap & 0x00000010) { gf100_gr_trap_intr()
1040 trap &= ~0x00000010; gf100_gr_trap_intr()
1043 if (trap & 0x00000040) { gf100_gr_trap_intr()
1048 trap &= ~0x00000040; gf100_gr_trap_intr()
1051 if (trap & 0x00000080) { gf100_gr_trap_intr()
1056 trap &= ~0x00000080; gf100_gr_trap_intr()
1059 if (trap & 0x00000100) { gf100_gr_trap_intr()
1069 trap &= ~0x00000100; gf100_gr_trap_intr()
1072 if (trap & 0x01000000) { gf100_gr_trap_intr()
1083 trap &= ~0x01000000; gf100_gr_trap_intr()
1086 if (trap & 0x02000000) { gf100_gr_trap_intr()
1096 trap &= ~0x02000000; gf100_gr_trap_intr()
1099 if (trap) { gf100_gr_trap_intr()
1100 nvkm_error(subdev, "TRAP UNHANDLED %08x\n", trap); gf100_gr_trap_intr()
1101 nvkm_wr32(device, 0x400108, trap); gf100_gr_trap_intr()
/linux-4.4.14/arch/parisc/math-emu/
H A Ddecode_exc.c159 * we can tell if a trap really occurs while decode_fpu()
165 * Now emulate this instruction. If a trap occurs, decode_fpu()
178 * subsequent real trap (I don't understand fully -PB) decode_fpu()
213 /* check for underflow trap enabled */ decode_fpu()
220 * Isn't a real trap; we need to decode_fpu()
258 * exception. If inexact trap is enabled, decode_fpu()
259 * want to do an inexact trap, otherwise decode_fpu()
289 /* check for overflow trap enabled */ decode_fpu()
298 * Isn't a real trap; we need to decode_fpu()
313 * exception. If inexact trap is enabled, decode_fpu()
314 * want to do an inexact trap, otherwise decode_fpu()
H A Ddfdiv.c98 /* trap if INVALIDTRAP enabled */ dbl_fdiv()
109 /* trap if INVALIDTRAP enabled */ dbl_fdiv()
141 /* trap if INVALIDTRAP enabled */ dbl_fdiv()
292 /* trap if OVERFLOWTRAP enabled */ dbl_fdiv()
314 /* trap if UNDERFLOWTRAP enabled */ dbl_fdiv()
H A Ddfmpy.c102 /* trap if INVALIDTRAP enabled */ dbl_fmpy()
113 /* trap if INVALIDTRAP enabled */ dbl_fmpy()
154 /* trap if INVALIDTRAP enabled */ dbl_fmpy()
287 /* trap if OVERFLOWTRAP enabled */ dbl_fmpy()
309 /* trap if UNDERFLOWTRAP enabled */ dbl_fmpy()
H A Dfcnvff.c86 /* trap if INVALIDTRAP enabled */ sgl_to_dbl_fcnvff()
175 /* trap if INVALIDTRAP enabled */ dbl_to_sgl_fcnvff()
248 /* trap if OVERFLOWTRAP enabled */ dbl_to_sgl_fcnvff()
276 /* trap if UNDERFLOWTRAP enabled */ dbl_to_sgl_fcnvff()
303 * Trap if inexact trap is enabled dbl_to_sgl_fcnvff()
H A Dsfdiv.c96 /* trap if INVALIDTRAP enabled */ sgl_fdiv()
107 /* trap if INVALIDTRAP enabled */ sgl_fdiv()
139 /* trap if INVALIDTRAP enabled */ sgl_fdiv()
286 /* trap if OVERFLOWTRAP enabled */ sgl_fdiv()
308 /* trap if UNDERFLOWTRAP enabled */ sgl_fdiv()
H A Dsfmpy.c99 /* trap if INVALIDTRAP enabled */ sgl_fmpy()
110 /* trap if INVALIDTRAP enabled */ sgl_fmpy()
151 /* trap if INVALIDTRAP enabled */ sgl_fmpy()
273 /* trap if OVERFLOWTRAP enabled */ sgl_fmpy()
295 /* trap if UNDERFLOWTRAP enabled */ sgl_fmpy()
H A Ddfrem.c81 /* trap if INVALIDTRAP enabled */ dbl_frem()
92 /* trap if INVALIDTRAP enabled */ dbl_frem()
123 /* trap if INVALIDTRAP enabled */ dbl_frem()
273 /* trap if UNDERFLOWTRAP enabled */ dbl_frem()
H A Dfcnvfut.c91 * If negative, trap unimplemented. sgl_to_sgl_fcnvfut()
160 * If negative, trap unimplemented. sgl_to_dbl_fcnvfut()
230 * If negative, trap unimplemented. dbl_to_sgl_fcnvfut()
299 * If negative, trap unimplemented. dbl_to_dbl_fcnvfut()
H A Dsfrem.c80 /* trap if INVALIDTRAP enabled */ sgl_frem()
91 /* trap if INVALIDTRAP enabled */ sgl_frem()
122 /* trap if INVALIDTRAP enabled */ sgl_frem()
267 /* trap if UNDERFLOWTRAP enabled */ sgl_frem()
H A Dfmpyfadd.c142 /* trap if INVALIDTRAP enabled */ dbl_fmpyfadd()
153 /* trap if INVALIDTRAP enabled */ dbl_fmpyfadd()
166 /* trap if INVALIDTRAP enabled */ dbl_fmpyfadd()
233 /* trap if INVALIDTRAP enabled */ dbl_fmpyfadd()
244 /* trap if INVALIDTRAP enabled */ dbl_fmpyfadd()
274 /* trap if INVALIDTRAP enabled */ dbl_fmpyfadd()
672 /* trap if OVERFLOWTRAP enabled */ dbl_fmpyfadd()
802 /* trap if INVALIDTRAP enabled */ dbl_fmpynfadd()
813 /* trap if INVALIDTRAP enabled */ dbl_fmpynfadd()
826 /* trap if INVALIDTRAP enabled */ dbl_fmpynfadd()
893 /* trap if INVALIDTRAP enabled */ dbl_fmpynfadd()
904 /* trap if INVALIDTRAP enabled */ dbl_fmpynfadd()
934 /* trap if INVALIDTRAP enabled */ dbl_fmpynfadd()
1458 /* trap if INVALIDTRAP enabled */ sgl_fmpyfadd()
1469 /* trap if INVALIDTRAP enabled */ sgl_fmpyfadd()
1482 /* trap if INVALIDTRAP enabled */ sgl_fmpyfadd()
1549 /* trap if INVALIDTRAP enabled */ sgl_fmpyfadd()
1560 /* trap if INVALIDTRAP enabled */ sgl_fmpyfadd()
1590 /* trap if INVALIDTRAP enabled */ sgl_fmpyfadd()
2100 /* trap if INVALIDTRAP enabled */ sgl_fmpynfadd()
2111 /* trap if INVALIDTRAP enabled */ sgl_fmpynfadd()
2124 /* trap if INVALIDTRAP enabled */ sgl_fmpynfadd()
2191 /* trap if INVALIDTRAP enabled */ sgl_fmpynfadd()
2202 /* trap if INVALIDTRAP enabled */ sgl_fmpynfadd()
2232 /* trap if INVALIDTRAP enabled */ sgl_fmpynfadd()
H A Ddfsqrt.c71 /* trap if INVALIDTRAP enabled */ dbl_fsqrt()
100 /* trap if INVALIDTRAP enabled */ dbl_fsqrt()
H A Dfrnd.c66 /* trap if INVALIDTRAP enabled */ sgl_frnd()
171 /* trap if INVALIDTRAP enabled */ dbl_frnd()
H A Dsfsqrt.c71 /* trap if INVALIDTRAP enabled */ sgl_fsqrt()
99 /* trap if INVALIDTRAP enabled */ sgl_fsqrt()
H A Dfcnvfu.c94 * If negative, trap unimplemented. sgl_to_sgl_fcnvfu()
215 * If negative, trap unimplemented. sgl_to_dbl_fcnvfu()
333 * If negative, trap unimplemented. dbl_to_sgl_fcnvfu()
457 * If negative, trap unimplemented. dbl_to_dbl_fcnvfu()
/linux-4.4.14/drivers/lguest/
H A Dinterrupts_and_traps.c22 /* Allow Guests to use a non-128 (ie. non-Linux) syscall trap. */
60 * an interrupt or trap. The mechanics of delivering traps and interrupts to
134 * This actually makes the Guest start executing the given interrupt/trap
138 * interrupt or trap. It's split into two parts for traditional reasons: gcc
172 /* This restores the eflags word which was pushed on the stack by a trap */ restore_eflags()
327 * Linux uses trap 128 for system calls. Plan9 uses 64, and Ron Minnich sent
378 static bool has_err(unsigned int trap) has_err() argument
380 return (trap == 8 || (trap >= 10 && trap <= 14) || trap == 17); has_err()
383 /* deliver_trap() returns true if it could deliver the trap. */ deliver_trap()
387 * Trap numbers are always 8 bit, but we set an impossible trap number deliver_trap()
406 * Here's the hard part: returning to the Host every time a trap happens
408 * Particularly because Guest userspace system calls are traps (usually trap
417 * This routine indicates if a particular trap number could be delivered
432 * device not available (TS handling) and of course, the hypercall trap. direct_trap()
439 * The Guest has the ability to turn its interrupt gates into trap gates,
440 * if it is careful. The Host will let trap gates can go directly to the
443 * "no-interrupt" regions, and the Guest could point the trap gate at
459 * CPU trying to deliver the trap will fault while trying to push the interrupt
520 static void set_trap(struct lg_cpu *cpu, struct desc_struct *trap, set_trap() argument
527 trap->a = trap->b = 0; set_trap()
531 /* We only support interrupt and trap gates. */ set_trap()
537 * type. The privilege level controls where the trap can be triggered set_trap()
541 trap->a = ((__KERNEL_CS|GUEST_PL)<<16) | (lo&0x0000FFFF); set_trap()
542 trap->b = (hi&0xFFFFEF00); set_trap()
582 int trap, default_idt_entry()
593 if (trap == LGUEST_TRAP_ENTRY) default_idt_entry()
634 /* If no Guest can ever override this trap, leave it alone. */ copy_traps()
639 * Only trap gates (type 15) can go direct to the Guest. copy_traps()
581 default_idt_entry(struct desc_struct *idt, int trap, const unsigned long handler, const struct desc_struct *base) default_idt_entry() argument
H A Dhypercalls.c189 if (cpu->pending.trap) do_async_hcalls()
279 if (!cpu->pending.trap) { do_hypercalls()
284 * the trap number to indicate a hypercall is pending. do_hypercalls()
286 * update the trap number before we come back here. do_hypercalls()
H A Dlguest_user.c85 * Deliver a trap: this is used by the Launcher if it can't emulate
88 static int trap(struct lg_cpu *cpu, const unsigned long __user *input) trap() function
144 if (cpu->pending.trap) read()
145 cpu->pending.trap = 0; read()
336 return trap(cpu, input); write()
/linux-4.4.14/arch/sh/mm/
H A Dextable_64.c25 * Some functions that may trap due to a bad user-mode address have too
31 * conventional way. So it's functionally OK to just handle any trap
/linux-4.4.14/arch/m68k/kernel/
H A Dsun3-head.S71 /* Point MSP at an invalid page to trap if it's used. --m */
82 trap #15
H A Dvectors.c33 asmlinkage void trap(void);
70 vectors[VEC_ILLEGAL] = trap; base_trap_init()
83 vectors[i] = trap; trap_init()
H A Dentry.S45 .globl system_call, buserr, trap, resume
92 ENTRY(trap)
142 trap #0
146 trap #0
/linux-4.4.14/arch/ia64/include/asm/
H A Dfpswa.h34 * the trap/fault handler
55 * assist trap/fault handler.
/linux-4.4.14/tools/testing/selftests/ftrace/
H A Dftracetest194 trap 'SIG_RESULT=$FAIL' $SIG_FAIL
201 trap 'SIG_RESULT=$UNRESOLVED' $SIG_UNRESOLVED
208 trap 'SIG_RESULT=$UNTESTED' $SIG_UNTESTED
215 trap 'SIG_RESULT=$UNSUPPORTED' $SIG_UNSUPPORTED
222 trap 'SIG_RESULT=$XFAIL' $SIG_XFAIL
/linux-4.4.14/arch/alpha/include/uapi/asm/
H A Dfpu.h8 #define FPCR_DNOD (1UL<<47) /* denorm INV trap disable */
34 * IEEE trap enables are implemented in software. These per-thread
82 * Convert the software IEEE trap enable and status bits into the
/linux-4.4.14/arch/microblaze/kernel/
H A Dentry.S2 * Low-level system-call handling, trap handlers and context-switching
190 swi r14, r1, PT_PC; /* PC, before IRQ/trap */ \
226 lwi r14, r1, PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\
281 * User trap.
317 /* where the trap should return need -8 to adjust for rtsd r15, 8*/
373 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
382 /* Entry point used to return from a syscall/trap */
457 brid ret_from_trap; /* Do normal trap return */
482 /* PC, before IRQ/trap - this is one instruction above */
487 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
496 * Unaligned data trap.
498 * Unaligned data trap last on 4k page is handled here.
518 /* PC, before IRQ/trap - this is one instruction above */
521 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
545 /* data and intruction trap - which is choose is resolved int fault.c */
548 /* PC, before IRQ/trap - this is one instruction above */
551 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
560 /* PC, before IRQ/trap - this is one instruction above */
563 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
584 /* Call the scheduler before returning from a syscall/trap. */
596 * Not all registers are saved by the normal trap/interrupt entry
752 * Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18
831 /* Call the scheduler before returning from a syscall/trap. */
854 rtbd r16, 0; /* MS: Instructions to return from a debug trap */
867 rtbd r16, 0; /* MS: Instructions to return from a debug trap */
970 brai TOPHYS(_debug_exception); /* debug trap handler */
H A Dptrace.c56 * of the kernel stack. The kernel trap/irq exit path takes reg_save_addr()
61 * kernel via [syscall] trap, is not stored anywhere; that's reg_save_addr()
63 * when the trap returns anyway (so we don't actually bother to reg_save_addr()
/linux-4.4.14/arch/um/kernel/
H A DMakefile15 signal.o syscall.o sysrq.o time.o tlb.o trap.o \
H A Dptrace.c155 /* Fake a debug trap */ syscall_trace_leave()
/linux-4.4.14/samples/pktgen/
H A Dpktgen.conf-1-1-flows64 trap true INT
H A Dpktgen.conf-1-1-ip657 trap true INT
H A Dpktgen.conf-1-1-ip6-rdos60 trap true INT
H A Dpktgen.conf-1-1-rdos61 trap true INT
H A Dpktgen.conf-1-266 trap true INT
H A Dpktgen_sample03_burst_single_flow.sh78 # trap keyboard interrupt (Ctrl-C)
79 trap control_c SIGINT
/linux-4.4.14/arch/powerpc/sysdev/
H A Ddcr-low.S25 1: trap; \
/linux-4.4.14/arch/metag/tbx/
H A Dtbilogf.S10 * Defines __TBILogF trap code for debugging messages and __TBICont for debug
/linux-4.4.14/arch/microblaze/include/asm/
H A Dentry.h2 * Definitions used by low-level trap handlers
/linux-4.4.14/arch/parisc/include/asm/
H A Dhardirq.h44 #define ack_bad_irq(irq) WARN(1, "unexpected IRQ trap at vector %02x\n", irq)
/linux-4.4.14/arch/x86/include/asm/
H A Dlguest_hcall.h36 * Our hypercall mechanism uses the highest unused trap code (traps 32 and
51 /* "int" is the Intel instruction to trigger a trap. */ hcall()
H A Dkgdb.h87 struct pt_regs *regs, long err, int trap, int sig);
H A Dvm86.h11 * hardware when a trap occurs), and the real segment descriptors are
H A Dkvm_para.h24 /* On AMD processors, vmcall will generate a trap that we will
/linux-4.4.14/arch/mips/kernel/
H A Dkgdb.c39 unsigned char signo; /* Signal that we map this trap into */
46 { 13, SIGTRAP }, /* trap */
292 int trap = (regs->cp0_cause & 0x7c) >> 2; kgdb_mips_notify() local
315 if (kgdb_handle_exception(trap, compute_signal(trap), cmd, regs)) { kgdb_mips_notify()
321 if ((trap == 9) && (regs->cp0_epc == (unsigned long)breakinst)) kgdb_mips_notify()
334 struct pt_regs *regs, long err, int trap, int sig) kgdb_ll_trap()
340 .trapnr = trap, kgdb_ll_trap()
333 kgdb_ll_trap(int cmd, const char *str, struct pt_regs *regs, long err, int trap, int sig) kgdb_ll_trap() argument
H A Duprobes.c105 * is_trap_insn - check if the instruction is a trap variant
107 * Returns true if @insn is a trap variant.
110 * and is needed for the case where an architecture has multiple trap
112 * modern conditional trap instructions.
/linux-4.4.14/arch/alpha/oprofile/
H A Dop_model_ev67.c94 * Arithmetic trap
121 PM_MISPREDICT, /* Branch caused mispredict trap */
124 PM_REPLAY, /* Replay trap */
125 PM_LOAD_STORE, /* Load-store order trap */
157 unsigned trap: 1; /* 39 */ ev67_handle_interrupt() member in struct:__anon126::__anon127
188 if (i_stat.fields.trap) { ev67_handle_interrupt()
/linux-4.4.14/arch/parisc/kernel/
H A Dtraps.c550 /* Recovery counter trap */ handle_interruption()
573 /* Illegal instruction trap */ handle_interruption()
579 /* Break instruction trap */ handle_interruption()
584 /* Privileged operation trap */ handle_interruption()
590 /* Privileged register trap */ handle_interruption()
681 /* PCXL: Data memory access rights trap */ handle_interruption()
687 /* Data memory break trap */ handle_interruption()
688 regs->gr[0] |= PSW_X; /* So we can single-step over the trap */ handle_interruption()
691 /* Page reference trap */ handle_interruption()
696 /* Taken branch trap */ handle_interruption()
707 /* PCXL: Instruction memory protection trap */ handle_interruption()
738 /* Data memory protection ID trap */ handle_interruption()
743 die_if_kernel("Protection id trap", regs, code); handle_interruption()
755 /* Unaligned data reference trap */ handle_interruption()
H A Dhpmc.S26 * returns to the default trap handler with code set to 1 (HPMC).
27 * The default trap handler calls handle interruption, which
257 ldi 1,%r8 /* Set trap code to "1" for HPMC */
/linux-4.4.14/lib/
H A Dbug.c29 3. Implement the trap
30 - In the illegal instruction trap handler (typically), verify
36 to the expected BUG trap instruction.
/linux-4.4.14/arch/powerpc/mm/
H A Dhugepage-hash64.c22 pmd_t *pmdp, unsigned long trap, unsigned long flags, __hash_page_thp()
77 rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap); __hash_page_thp()
171 hash_failure_debug(ea, access, vsid, trap, ssize, __hash_page_thp()
21 __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid, pmd_t *pmdp, unsigned long trap, unsigned long flags, int ssize, unsigned int psize) __hash_page_thp() argument
H A Dhugetlbpage-hash64.c22 pte_t *ptep, unsigned long trap, unsigned long flags, __hash_page_huge()
70 rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap); __hash_page_huge()
116 hash_failure_debug(ea, access, vsid, trap, ssize, __hash_page_huge()
21 __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid, pte_t *ptep, unsigned long trap, unsigned long flags, int ssize, unsigned int shift, unsigned int mmu_psize) __hash_page_huge() argument
H A Dhash_utils_64.c852 unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap) hash_page_do_lazy_icache() argument
863 if (trap == 0x400) { hash_page_do_lazy_icache()
960 unsigned long vsid, unsigned long trap, hash_failure_debug()
967 pr_info(" trap=0x%lx vsid=0x%lx ssize=%d base psize=%d psize %d pte=0x%lx\n", hash_failure_debug()
968 trap, vsid, ssize, psize, lpsize, pte); hash_failure_debug()
994 unsigned long access, unsigned long trap, hash_page_mm()
1007 DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n", hash_page_mm()
1008 ea, access, trap); hash_page_mm()
1009 trace_hash_fault(ea, access, trap); hash_page_mm()
1094 trap, flags, ssize, psize); hash_page_mm()
1097 rc = __hash_page_huge(ea, access, vsid, ptep, trap, hash_page_mm()
1157 rc = __hash_page_64K(ea, access, vsid, ptep, trap, hash_page_mm()
1166 rc = __hash_page_4K(ea, access, vsid, ptep, trap, hash_page_mm()
1174 hash_failure_debug(ea, access, vsid, trap, ssize, psize, hash_page_mm()
1190 int hash_page(unsigned long ea, unsigned long access, unsigned long trap, hash_page() argument
1202 return hash_page_mm(mm, ea, access, trap, flags); hash_page()
1207 unsigned long access, unsigned long trap) hash_preload()
1225 " trap=%lx\n", mm, mm->pgd, ea, access, trap); hash_preload()
1270 rc = __hash_page_64K(ea, access, vsid, ptep, trap, hash_preload()
1274 rc = __hash_page_4K(ea, access, vsid, ptep, trap, update_flags, hash_preload()
1281 hash_failure_debug(ea, access, vsid, trap, ssize, hash_preload()
959 hash_failure_debug(unsigned long ea, unsigned long access, unsigned long vsid, unsigned long trap, int ssize, int psize, int lpsize, unsigned long pte) hash_failure_debug() argument
993 hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, unsigned long trap, unsigned long flags) hash_page_mm() argument
1206 hash_preload(struct mm_struct *mm, unsigned long ea, unsigned long access, unsigned long trap) hash_preload() argument
H A Dmem.c495 unsigned long access = 0, trap; update_mmu_cache() local
510 trap = TRAP(current->thread.regs); update_mmu_cache()
511 if (trap == 0x400) update_mmu_cache()
513 else if (trap != 0x300) update_mmu_cache()
515 hash_preload(vma->vm_mm, address, access, trap); update_mmu_cache()
/linux-4.4.14/arch/arm/nwfpe/
H A Dfpmodule.c133 point exception. We check the trap enable byte in the FPSR, and raise
159 /* For each type of exception, the cumulative trap exception bit is only float_raise()
160 set if the corresponding trap enable bit is not set. */ float_raise()
H A Dentry.S43 r9) and the kernel takes care of returning control from the trap to
70 This is done to reduce the effect of the trap overhead on each
72 instructions to allow the emulator to spread the cost of the trap over
/linux-4.4.14/arch/m68k/sun3x/
H A Dprom.c49 asm volatile ("trap #14"); sun3x_halt()
115 /* point trap #14 at abort. sun3x_prom_init()
/linux-4.4.14/arch/frv/include/asm/
H A Dirqflags.h25 * - if taken, the trap:
79 /* then trap if Z=0 and C=0 */ arch_local_irq_restore()
/linux-4.4.14/arch/x86/um/vdso/
H A Dum_vdso.c8 * This vDSO turns all calls into a syscall so that UML can trap them.
/linux-4.4.14/arch/alpha/include/asm/
H A Dfpu.h10 are implied trap barriers. */
/linux-4.4.14/arch/arc/include/uapi/asm/
H A Dptrace.h48 unsigned long stop_pc; /* give dbg stop_pc after ensuring brkpt trap */
/linux-4.4.14/scripts/
H A Ddecodecode19 trap cleanup EXIT
H A Dextract-ikconfig53 trap "rm -f $tmp1 $tmp2" 0
H A Dextract-vmlinux49 trap "rm -f $tmp" 0
H A Dlink-vmlinux.sh132 trap on_exit EXIT
138 trap on_signals HUP INT QUIT TERM
/linux-4.4.14/scripts/kconfig/lxdialog/
H A Dcheck-lxdialog.sh44 trap "rm -f $tmp" 0 1 2 3 15
/linux-4.4.14/arch/powerpc/kernel/
H A Dppc32.h29 unsigned int trap; /* Reason for being here */ member in struct:pt_regs32
H A Dkprobes.c106 * instruction even if the probed insn is a trap prepare_singlestep()
108 * if the trap is taken or not prepare_singlestep()
184 /* If trap variant, then it belongs not to us */ kprobe_handler()
207 * PowerPC has multiple variants of the "trap" kprobe_handler()
209 * trap variant, it could belong to someone else kprobe_handler()
522 asm volatile("trap" ::: "memory"); jprobe_return()
535 * of the "trap" in jprobe_return() above, before restoring the longjmp_break_handler()
H A Dhead_booke.h193 trap
226 #define EXC_XFER_TEMPLATE(hdlr, trap, msr, copyee, tfer, ret) \
227 li r10,trap; \
261 * If we get a debug trap on the first instruction of an exception handler,
262 * we reset the MSR_DE in the _exception handler's_ MSR (the debug trap is
H A Dprocess.c618 "ccr=%lx, msr=%lx, trap=%lx)\n", tm_reclaim_task()
621 thr->regs->trap); tm_reclaim_task()
791 * If it tries to use the fpu again, it'll trap and __switch_to()
832 /* Avoid the trap. On smp this this never happens since __switch_to()
843 /* Avoid the trap. On smp this this never happens since __switch_to()
1013 int i, trap; show_regs() local
1020 regs, regs->trap, print_tainted(), init_utsname()->release); show_regs()
1024 trap = TRAP(regs); show_regs()
1025 if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) show_regs()
1027 if (trap == 0x200 || trap == 0x300 || trap == 0x600) show_regs()
1254 regs->trap &= ~1UL; start_thread()
1595 regs->trap, (void *)regs->nip, (void *)lr); show_stack()
/linux-4.4.14/arch/sh/include/asm/
H A Dbug.h17 * %3 - trap type
/linux-4.4.14/arch/sh/kernel/cpu/sh3/
H A Dex.S51 .long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger
/linux-4.4.14/arch/mn10300/include/asm/
H A Dhardirq.h43 * - note that the MN103E010 doesn't always trap through the correct vector,
/linux-4.4.14/arch/nios2/include/asm/
H A Dkgdb.h90 __asm__ __volatile__("trap 30\n"); arch_kgdb_breakpoint()
/linux-4.4.14/arch/m68k/fpsp040/
H A Dx_snan.S9 | For trap disabled the 040 does the following:
16 | For trap enabled the 040 does the following:
17 | If the inst is move_out, then the results are the same as for trap
50 | Check if trap enabled
H A Dkernel_ex.S49 | if dz trap disabled
56 | else dz trap enabled
105 | if (operr trap disabled)
110 | else (operr trap enabled)
267 | is set, but the underflow trap was not taken, the aunfl bit in
309 btstb #snan_bit,FPCR_ENABLE(%a6) |check if trap enabled
343 btstb #snan_bit,FPCR_ENABLE(%a6) |check if trap enabled
/linux-4.4.14/arch/blackfin/include/asm/
H A Dirq_handler.h26 asmlinkage void trap(void);
/linux-4.4.14/tools/arch/sparc/include/asm/
H A Dbarrier_64.h8 * branch, the chip can stop executing instructions until a trap occurs.
/linux-4.4.14/tools/time/
H A Dudelay_test.sh44 trap cleanup EXIT
/linux-4.4.14/arch/sparc/math-emu/
H A Dmath_64.c105 /* Determine if this exception would have generated a trap. */ record_exception()
129 * when the IEEE exception trap is enabled in TEM. record_exception()
136 * If a trap would not be generated, the record_exception()
143 /* If trapping, indicate fault trap type IEEE. */ record_exception()
149 /* If we will not trap, advance the program counter over record_exception()
362 * use the fp_exception_other trap. Instead it signals an do_mathemu()
363 * illegal instruction and leaves the FP trap type field of do_mathemu()
H A Dmath_32.c151 * This code should also handle the case where the trap was precise, do_mathemu()
156 * [The UltraSPARC makes FP a precise trap; this isn't as stupid as it do_mathemu()
179 printk("precise trap at %08lx\n", regs->pc); do_mathemu()
221 /* Determine if this exception would have generated a trap. */ record_exception()
245 * when the IEEE exception trap is enabled in TEM. record_exception()
252 * If a trap would not be generated, the record_exception()
259 /* If trapping, indicate fault trap type IEEE. */ record_exception()
/linux-4.4.14/arch/x86/lguest/
H A Dhead_32.S108 /* This is the actual hypercall trap. */
140 * When the Host reflects a trap or injects an interrupt into the Guest, it
147 * This turns out to be harmless: the only trap which should happen under Linux
150 * trap *does* go off when interrupts are disabled, the Guest will panic, and
158 * The "iret" instruction is used to return from an interrupt or trap. The
/linux-4.4.14/arch/alpha/math-emu/
H A Dmath.c90 * instruction to be emulated is illegal (such as with the opDEC trap), else
175 /* CMPTEQ, CMPTUN don't trap on QNaN, alpha_fp_emul()
347 * be written at most once in the trap shadow. alpha_fp_emul_imprecise()
350 * bound the trap shadow, so we need not look any further than alpha_fp_emul_imprecise()
390 /* Re-execute insns in the trap-shadow. */ alpha_fp_emul_imprecise()
/linux-4.4.14/arch/powerpc/kvm/
H A Dtrace_hv.h252 __field(int, trap)
260 __entry->trap = vcpu->arch.trap;
266 TP_printk("VCPU %d: trap=%s pc=0x%lx msr=0x%lx, ceded=%d",
268 __print_symbolic(__entry->trap, kvm_trace_symbol_exit),
/linux-4.4.14/net/ipv4/netfilter/
H A Dnf_nat_snmp_basic.c924 struct snmp_v1_trap *trap, snmp_trap_decode()
937 if (!asn1_oid_decode(ctx, end, &trap->id, &trap->id_len)) snmp_trap_decode()
947 if (!asn1_octets_decode(ctx, end, (unsigned char **)&trap->ip_address, &len)) snmp_trap_decode()
962 if (!asn1_uint_decode(ctx, end, &trap->general)) snmp_trap_decode()
971 if (!asn1_uint_decode(ctx, end, &trap->specific)) snmp_trap_decode()
981 if (!asn1_ulong_decode(ctx, end, &trap->time)) snmp_trap_decode()
987 kfree((unsigned long *)trap->ip_address); snmp_trap_decode()
990 kfree(trap->id); snmp_trap_decode()
1103 * Request header or v1 trap snmp_parse_mangle()
1106 struct snmp_v1_trap trap; snmp_parse_mangle() local
1107 unsigned char ret = snmp_trap_decode(&ctx, &trap, map, check); snmp_parse_mangle()
1110 kfree(trap.id); snmp_parse_mangle()
1111 kfree((unsigned long *)trap.ip_address); snmp_parse_mangle()
923 snmp_trap_decode(struct asn1_ctx *ctx, struct snmp_v1_trap *trap, const struct oct1_map *map, __sum16 *check) snmp_trap_decode() argument
/linux-4.4.14/kernel/
H A Dptrace.c354 /* SEIZE doesn't trap tracee on attach */ ptrace_attach()
924 * control. At least one trap is guaranteed to happen ptrace_request()
926 * current trap is not disturbed and another trap will ptrace_request()
927 * happen after the current trap is ended with PTRACE_CONT. ptrace_request()
929 * The actual trap might not be PTRACE_EVENT_STOP trap but ptrace_request()
936 * INTERRUPT doesn't disturb existing trap sans one ptrace_request()
938 * STOP, this INTERRUPT should clear LISTEN and re-trap ptrace_request()
953 * stop state change) happens, tracee will enter STOP trap ptrace_request()
955 * finish listening and re-trap tracee into STOP. ptrace_request()
965 * start of this trap and now. Trigger re-trap. ptrace_request()
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Duvd_v2_2.c32 * uvd_v2_2_fence_emit - emit an fence & trap command
37 * Write a fence and a trap command to the ring.
/linux-4.4.14/include/rdma/
H A Dib_smi.h162 * Other local changes flags (trap 144).
169 * M_Key volation flags in dr_trunc_hop (trap 256).
/linux-4.4.14/arch/mips/include/uapi/asm/
H A Dsignal.h28 #define SIGTRAP 5 /* Trace trap (POSIX). */
29 #define SIGIOT 6 /* IOT trap (4.2 BSD). */
/linux-4.4.14/arch/mips/math-emu/
H A Ddsemul.c51 * and put a trap after it which we can catch and jump to mips_dsemul()
140 * At this point, we are satisfied that it's a BD emulation trap. Yes, do_dsemulret()
/linux-4.4.14/arch/nios2/kernel/
H A Dkgdb.c151 else /* pass the first trap 30 code */ kgdb_breakpoint_c()
169 /* Breakpoint instruction: trap 30 */
/linux-4.4.14/arch/ia64/kernel/
H A Dtraps.c2 * Architecture-specific trap handling.
343 /* is next instruction a trap? */ handle_fpu_swa()
533 * Got a trap in fsys-mode: Taken Branch Trap ia64_fault()
534 * and Single Step trap need special handling; ia64_fault()
535 * Debug trap is ignored (we disable it here ia64_fault()
536 * and re-enable it in the lower-privilege trap). ia64_fault()
578 case 33: /* fp trap */ ia64_fault()
636 printk(KERN_ERR "Unexpected IA-32 intercept trap (Trap 46)\n"); ia64_fault()
/linux-4.4.14/tools/testing/selftests/x86/
H A Dunwind_vdso.c92 unsigned long ip; /* trap source */
93 int depth; /* -1 until we hit the trap source */
/linux-4.4.14/drivers/net/ethernet/mellanox/mlxsw/
H A Dreg.h335 /* forward and trap, trap_id is FDB_TRAP */
337 /* trap and do not forward, trap_id is FDB_TRAP */
1884 * Trap group number. User defined number specifying which trap groups
1885 * should be forwarded to the CPU. The mapping between trap IDs and trap
1903 * Policer ID for the trap group.
1914 * 2 - Mirror to a mirroring agent and do not trap to CPU.
1930 * only be trapped once, based on the trap ID associated with the group (via
1941 * CPU ingress traffic class for the trap group.
1951 * Receive descriptor queue (RDQ) to use for the trap group.
1990 * Configures trap IDs inside trap groups.
2008 * by the host. This option is only relevant for event trap IDs.
2031 * 5 - Trap and soft discard (allow other traps to overwrite this trap).
2034 * Note: Must be set to 0 (forward) for event trap IDs, as they are already
2040 * Trap group to associate the trap with.
2049 * Note: A trap ID can only be associated with a single trap group. The device
2050 * will associate the trap ID with the last trap group configured.
2063 * 1 - Do not use control buffer for this trap ID.
2064 * 2 - Use control buffer for this trap ID.
H A Dtrap.h2 * drivers/net/ethernet/mellanox/mlxsw/trap.h
/linux-4.4.14/arch/x86/include/asm/xen/
H A Dinterface_32.h32 /* And the trap vector is... */
/linux-4.4.14/arch/alpha/kernel/
H A Dirq.c37 printk(KERN_CRIT "Unexpected IRQ trap at vector %u\n", irq); ack_bad_irq()
/linux-4.4.14/arch/mn10300/kernel/
H A Dgdb-low.S110 # GDB stub BUG() trap
/linux-4.4.14/tools/testing/selftests/firmware/
H A Dfw_filesystem.sh36 trap "test_finish" EXIT
/linux-4.4.14/drivers/lguest/x86/
H A Dcore.c117 /* Copy direct-to-Guest trap entries. */ copy_in_guest_info()
145 * Set the trap number to 256 (impossible value). If we fault while run_guest_once()
251 * we set it now, so we can trap and pass that trap to the Guest if it lguest_arch_run_guest()
276 * not really registers: a trap number which says what interrupt or lguest_arch_run_guest()
277 * trap made the switcher code come back, and an error code which some lguest_arch_run_guest()
298 * Similarly, if we took a trap because the Guest used the FPU, lguest_arch_run_guest()
317 * When the Guest uses one of these instructions, we get a trap (General
361 cpu->pending.trap = 13; setup_emulate_insn()
368 cpu->pending.trap = 14; setup_iomem_insn()
449 /* We didn't handle the trap, so it needs to go to the Guest. */ lguest_arch_handle_trap()
456 kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)", lguest_arch_handle_trap()
/linux-4.4.14/arch/unicore32/kernel/
H A Dtraps.c189 /* trap and error numbers are mostly meaningless on UniCore */ __die()
241 struct siginfo *info, unsigned long err, unsigned long trap) uc32_notify_die()
245 current->thread.trap_no = trap; uc32_notify_die()
240 uc32_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info, unsigned long err, unsigned long trap) uc32_notify_die() argument
/linux-4.4.14/include/uapi/asm-generic/
H A Dsiginfo.h183 #define ILL_ILLTRP (__SI_FAULT|4) /* illegal trap */
227 #define TRAP_TRACE (__SI_FAULT|2) /* process trace trap */
228 #define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */
/linux-4.4.14/arch/ia64/mm/
H A Dfault.c22 static inline int notify_page_fault(struct pt_regs *regs, int trap) notify_page_fault() argument
29 if (kprobe_running() && kprobe_fault_handler(regs, trap)) notify_page_fault()
37 static inline int notify_page_fault(struct pt_regs *regs, int trap) notify_page_fault() argument
/linux-4.4.14/arch/avr32/mm/
H A Dfault.c24 static inline int notify_page_fault(struct pt_regs *regs, int trap) notify_page_fault() argument
29 if (kprobe_running() && kprobe_fault_handler(regs, trap)) notify_page_fault()
36 static inline int notify_page_fault(struct pt_regs *regs, int trap) notify_page_fault() argument
/linux-4.4.14/tools/testing/selftests/breakpoints/
H A Dbreakpoint_test.c251 /* Icebp trap */ trigger_tests()
255 /* Int 3 trap */ trigger_tests()
371 check_success("Test int 3 trap"); launch_tests()
/linux-4.4.14/arch/m32r/kernel/
H A Dptrace.c464 /* Search debug trap entry. */ unregister_debug_trap()
470 /* The trap may be requested from debugger. unregister_debug_trap()
479 /* Shift debug trap entries. */ unregister_debug_trap()
533 /* Embed a debug trap (TRAP1) code */
545 /* Set a trap code. */ embed_debug_trap()
/linux-4.4.14/arch/arm64/kernel/
H A Dentry.S291 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
405 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
437 cmp x24, #ESR_ELx_EC_CP15_32 // CP15 MRC/MCR trap
439 cmp x24, #ESR_ELx_EC_CP15_64 // CP15 MRRC/MCRR trap
441 cmp x24, #ESR_ELx_EC_CP14_MR // CP14 MRC/MCR trap
443 cmp x24, #ESR_ELx_EC_CP14_LS // CP14 LDC/STC trap
445 cmp x24, #ESR_ELx_EC_CP14_64 // CP14 MRRC/MCRR trap
/linux-4.4.14/arch/arm/kvm/
H A Dinterrupts.S122 @ Set FPEXC_EN so the guest doesn't trap floating point instructions
170 @ Don't trap coprocessor accesses for host kernel
260 * HVC instructions cause a trap to the vector page + offset 0x14 (see hyp_hvc
262 * host kernel) and they cause a trap to the vector page + offset 0x8 when HVC
356 * Getting here is either becuase of a trap from a guest or from calling
477 * registers; however cp10 and cp11 accesses will still trap and fallback
526 .ascii "unexpected HVC/SVC trap in Hyp mode at: %#08x\n"
H A Dinterrupts_head.S587 bic r2, r2, r3 @ Don't trap any CRx accesses
605 bic r3, r2, r3 @ Don't trap defined coproc-accesses
629 bic r2, r2, r3 @ Don't trap any perfmon accesses
634 /* Enable/Disable: stage-2 trans., trap interrupts, trap wfi, trap smc */
/linux-4.4.14/arch/powerpc/xmon/
H A Dxmon.c106 static unsigned bpinstr = 0x7fe00008; /* trap */
434 cpu, regs->trap, getvecname(TRAP(regs))); xmon_core()
547 regs->trap, getvecname(TRAP(regs))); xmon_core()
639 /* Are we at the trap at bp->instr[1] for some bp? */ xmon_bpt()
1012 regs->trap = 0xd00 | (regs->trap & 1); do_step()
1293 (bp->enabled & BP_CIABR) ? "inst": "trap"); bpt_cmds()
1437 printf("--- Exception: %lx %s at ", regs.trap, xmon_show_stack()
1470 addr = regs->nip; /* address of trap instruction */ print_bug_trap()
1490 unsigned long trap; excprint() local
1496 trap = TRAP(fp); excprint()
1497 printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp); excprint()
1507 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) { excprint()
1509 if (trap != 0x380) excprint()
1523 if (trap == 0x700) excprint()
1529 int n, trap; prregs() local
1579 printf("ctr = "REG" xer = "REG" trap = %4lx\n", prregs()
1580 fp->ctr, fp->xer, fp->trap); prregs()
1581 trap = TRAP(fp); prregs()
1582 if (trap == 0x300 || trap == 0x380 || trap == 0x600) prregs()
2577 "trap", "dar", "dsisr", "res"
/linux-4.4.14/drivers/gpu/drm/ast/
H A Dast_post.c871 u32 trap, trap_AC2, trap_MRS; get_ddr3_info() local
875 /* Ger trap info */ get_ddr3_info()
876 trap = (ast_mindwm(ast, 0x1E6E2070) >> 25) & 0x3; get_ddr3_info()
877 trap_AC2 = 0x00020000 + (trap << 16); get_ddr3_info()
878 trap_AC2 |= 0x00300000 + ((trap & 0x2) << 19); get_ddr3_info()
879 trap_MRS = 0x00000010 + (trap << 4); get_ddr3_info()
880 trap_MRS |= ((trap & 0x2) << 18); get_ddr3_info()
1236 u32 trap, trap_AC2, trap_MRS; get_ddr2_info() local
1240 /* Ger trap info */ get_ddr2_info()
1241 trap = (ast_mindwm(ast, 0x1E6E2070) >> 25) & 0x3; get_ddr2_info()
1242 trap_AC2 = (trap << 20) | (trap << 16); get_ddr2_info()
1244 trap_MRS = 0x00000040 | (trap << 4); get_ddr2_info()
/linux-4.4.14/arch/powerpc/math-emu/
H A Dmath.c234 int eflag, trap; do_mathemu() local
441 trap = record_exception(regs, eflag); do_mathemu()
442 if (trap) do_mathemu()
/linux-4.4.14/drivers/irqchip/
H A Dalphascale_asm9260-icoll.h29 * The exception trap should have a LDPC instruction from this address:
/linux-4.4.14/arch/tile/lib/
H A Dmemcpy_user_64.c14 * Do memcpy(), but trap and return "n" when a load or store faults.
/linux-4.4.14/arch/x86/kernel/acpi/
H A Dsleep.c66 * 13), reading an invalid MSR is not guaranteed to trap, see x86_acpi_suspend_lowlevel()
/linux-4.4.14/arch/x86/kernel/
H A Dnmi_selftest.c44 /* trap all the unknown NMIs we may generate */ init_nmi_testsuite()
/linux-4.4.14/arch/arc/kernel/
H A Dkprobes.c102 /* Remove the trap instructions inserted for single step and resume_execution()
144 /* Now we insert the trap at the next location after this instruction to setup_singlestep()
145 * single step. If it is a branch we insert the trap at possible branch setup_singlestep()
268 * When we return from trap instruction we go to the next instruction arc_post_kprobe_handler()

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