Searched refs:tegra_fuse_read_early (Results 1 – 9 of 9) sorted by relevance
128 cpu_speedo[0] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_0); in tegra210_init_speedo_data()129 cpu_speedo[1] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_1); in tegra210_init_speedo_data()130 cpu_speedo[2] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_2); in tegra210_init_speedo_data()132 soc_speedo[0] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_0); in tegra210_init_speedo_data()133 soc_speedo[1] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_1); in tegra210_init_speedo_data()134 soc_speedo[2] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_2); in tegra210_init_speedo_data()136 cpu_iddq = tegra_fuse_read_early(FUSE_CPU_IDDQ) * 4; in tegra210_init_speedo_data()137 soc_iddq = tegra_fuse_read_early(FUSE_SOC_IDDQ) * 4; in tegra210_init_speedo_data()138 gpu_iddq = tegra_fuse_read_early(FUSE_GPU_IDDQ) * 5; in tegra210_init_speedo_data()
84 randomness[5] = tegra_fuse_read_early(FUSE_VENDOR_CODE); in tegra30_fuse_add_randomness()85 randomness[6] = tegra_fuse_read_early(FUSE_FAB_CODE); in tegra30_fuse_add_randomness()86 randomness[7] = tegra_fuse_read_early(FUSE_LOT_CODE_0); in tegra30_fuse_add_randomness()87 randomness[8] = tegra_fuse_read_early(FUSE_LOT_CODE_1); in tegra30_fuse_add_randomness()88 randomness[9] = tegra_fuse_read_early(FUSE_WAFER_ID); in tegra30_fuse_add_randomness()89 randomness[10] = tegra_fuse_read_early(FUSE_X_COORDINATE); in tegra30_fuse_add_randomness()90 randomness[11] = tegra_fuse_read_early(FUSE_Y_COORDINATE); in tegra30_fuse_add_randomness()
125 cpu_speedo_0_value = tegra_fuse_read_early(FUSE_CPU_SPEEDO_0); in tegra124_init_speedo_data()128 sku_info->gpu_speedo_value = tegra_fuse_read_early(FUSE_CPU_SPEEDO_2); in tegra124_init_speedo_data()130 soc_speedo_0_value = tegra_fuse_read_early(FUSE_SOC_SPEEDO_0); in tegra124_init_speedo_data()132 cpu_iddq_value = tegra_fuse_read_early(FUSE_CPU_IDDQ); in tegra124_init_speedo_data()133 soc_iddq_value = tegra_fuse_read_early(FUSE_SOC_IDDQ); in tegra124_init_speedo_data()134 gpu_iddq_value = tegra_fuse_read_early(FUSE_GPU_IDDQ); in tegra124_init_speedo_data()146 sku_info->cpu_iddq_value = tegra_fuse_read_early(FUSE_CPU_IDDQ); in tegra124_init_speedo_data()
77 tmp = tegra_fuse_read_early(0x270) << 1; in rev_sku_to_speedo_ids()78 tmp |= tegra_fuse_read_early(0x26c); in rev_sku_to_speedo_ids()98 cpu_speedo_val = tegra_fuse_read_early(0x12c) + 1024; in tegra114_init_speedo_data()99 soc_speedo_val = tegra_fuse_read_early(0x134); in tegra114_init_speedo_data()
96 reg = tegra_fuse_read_early(FUSE_SPEEDO_CALIB_0); in fuse_speedo_calib()101 ate_ver = tegra_fuse_read_early(FUSE_TEST_PROG_VER); in fuse_speedo_calib()124 int package_id = tegra_fuse_read_early(FUSE_PACKAGE_INFO) & 0x0F; in rev_sku_to_speedo_ids()
149 randomness[5] = tegra_fuse_read_early(FUSE_UID_LOW); in tegra20_fuse_add_randomness()150 randomness[6] = tegra_fuse_read_early(FUSE_UID_HIGH); in tegra20_fuse_add_randomness()
66 u32 __init tegra_fuse_read_early(unsigned int offset);
112 tegra_sku_info.sku_id = tegra_fuse_read_early(FUSE_SKU_INFO); in tegra_init_revision()
180 u32 __init tegra_fuse_read_early(unsigned int offset) in tegra_fuse_read_early() function