Searched refs:subc (Results 1 - 30 of 30) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/sw/
H A Dchan.h19 bool (*mthd)(struct nvkm_sw_chan *, int subc, u32 mthd, u32 data);
25 bool nvkm_sw_chan_mthd(struct nvkm_sw_chan *, int subc, u32 mthd, u32 data);
H A Dbase.c30 nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data) nvkm_sw_mthd() argument
39 handled = nvkm_sw_chan_mthd(chan, subc, mthd, data); nvkm_sw_mthd()
H A Dchan.c33 nvkm_sw_chan_mthd(struct nvkm_sw_chan *chan, int subc, u32 mthd, u32 data) nvkm_sw_chan_mthd() argument
43 return chan->func->mthd(chan, subc, mthd, data); nvkm_sw_chan_mthd()
H A Dnv04.c87 nv04_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data) nv04_sw_chan_mthd() argument
H A Dgf100.c57 gf100_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data) gf100_sw_chan_mthd() argument
H A Dnv50.c62 nv50_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data) nv50_sw_chan_mthd() argument
/linux-4.4.14/arch/c6x/lib/
H A Dremu.S57 || [B1] subc .l1x A4,B4,A4
60 [B1] subc .l1x A4,B4,A4
63 [B1] subc .l1x A4,B4,A4
65 [B1] subc .l1x A4,B4,A4
67 [B1] subc .l1x A4,B4,A4
69 [B1] subc .l1x A4,B4,A4
71 [B1] subc .l1x A4,B4,A4
76 [B1] subc .l1x A4,B4,A4
78 [B1] subc .l1x A4,B4,A4
H A Ddivremu.S22 ;; We use a series of up to 31 subc instructions. First, we find
25 ;; to the, and the number of times we have to execute subc.
52 || [b1] subc .l1x A4,B4,A4
54 [b1] subc .l1x A4,B4,A4
60 || [b1] subc .l1x A4,B4,A4
62 [b1] subc .l1x A4,B4,A4
65 [b1] subc .l1x A4,B4,A4
67 [b1] subc .l1x A4,B4,A4
69 [b1] subc .l1x A4,B4,A4
71 [b1] subc .l1x A4,B4,A4
73 [b1] subc .l1x A4,B4,A4
H A Ddivu.S39 ;; We use a series of up to 31 subc instructions. First, we find
42 ;; to the, and the number of times we have to execute subc.
64 || [B1] subc .l1x A4,B4,A4
66 [B1] subc .l1x A4,B4,A4
72 || [B1] subc .l1x A4,B4,A4
74 [B1] subc .l1x A4,B4,A4
77 [B1] subc .l1x A4,B4,A4
79 [B1] subc .l1x A4,B4,A4
81 [B1] subc .l1x A4,B4,A4
83 [B1] subc .l1x A4,B4,A4
85 [B1] subc .l1x A4,B4,A4
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/engine/
H A Dsw.h12 bool nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data);
/linux-4.4.14/arch/mn10300/lib/
H A D__ucmpdi2.S31 subc a1,d1 # may clear Z, never sets it
38 subc d0,d0 # -1 if LE, 0 if GE
/linux-4.4.14/drivers/media/i2c/
H A Dadv7175.c157 0x02, 0x0c, /* subc. freq. */
158 0x03, 0x8c, /* subc. freq. */
159 0x04, 0x79, /* subc. freq. */
160 0x05, 0x26, /* subc. freq. */
161 0x06, 0x40, /* subc. phase */
179 0x02, 0x0c, /* subc. freq. */
180 0x03, 0x8c, /* subc. freq. */
181 0x04, 0x79, /* subc. freq. */
182 0x05, 0x26, /* subc. freq. */
183 0x06, 0x40, /* subc. phase */
189 0x02, 0x55, /* subc. freq. */
190 0x03, 0x55, /* subc. freq. */
191 0x04, 0x55, /* subc. freq. */
192 0x05, 0x25, /* subc. freq. */
193 0x06, 0x1a, /* subc. phase */
/linux-4.4.14/drivers/gpu/drm/nouveau/
H A Dnouveau_dma.h111 BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size) BEGIN_NV04() argument
113 OUT_RING(chan, 0x00000000 | (subc << 13) | (size << 18) | mthd); BEGIN_NV04()
117 BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size) BEGIN_NI04() argument
119 OUT_RING(chan, 0x40000000 | (subc << 13) | (size << 18) | mthd); BEGIN_NI04()
123 BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size) BEGIN_NVC0() argument
125 OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2)); BEGIN_NVC0()
129 BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size) BEGIN_NIC0() argument
131 OUT_RING(chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2)); BEGIN_NIC0()
135 BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data) BEGIN_IMC0() argument
137 OUT_RING(chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2)); BEGIN_IMC0()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/ce/
H A Dgt215.c51 u32 subc = (addr & 0x3800) >> 11; gt215_ce_intr() local
57 "subc %d mthd %04x data %08x\n", ssta, gt215_ce_intr()
61 subc, mthd, data); gt215_ce_intr()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/sec/
H A Dg98.c50 u32 subc = (addr & 0x3800) >> 11; g98_sec_intr() local
56 "subc %d mthd %04x data %08x\n", ssta, g98_sec_intr()
60 subc, mthd, data); g98_sec_intr()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv50.c421 u32 subc = (addr & 0x00070000) >> 16; nv50_gr_trap_handler() local
431 "ch %d [%010llx %s] subc %d " nv50_gr_trap_handler()
434 chid, inst, name, subc, class, mthd, nv50_gr_trap_handler()
449 u32 subc = (addr & 0x00070000) >> 16; nv50_gr_trap_handler() local
457 "ch %d [%010llx %s] subc %d " nv50_gr_trap_handler()
460 subc, class, mthd, data, addr); nv50_gr_trap_handler()
627 u32 subc = (addr & 0x00070000) >> 16; nv50_gr_intr() local
664 nvkm_error(subdev, "%08x [%s] ch %d [%010llx %s] subc %d " nv50_gr_intr()
667 subc, class, mthd, data); nv50_gr_intr()
H A Dnv20.c190 u32 subc = (addr & 0x00070000) >> 16; nv20_gr_intr() local
193 u32 class = nvkm_rd32(device, 0x400160 + subc * 4) & 0xfff; nv20_gr_intr()
208 "nstatus %08x [%s] ch %d [%s] subc %d " nv20_gr_intr()
212 subc, class, mthd, data); nv20_gr_intr()
H A Dgf100.c1148 u32 subc = (addr & 0x00070000) >> 16; gf100_gr_ctxctl_isr() local
1152 nvkm_error(subdev, "FECS MTHD subc %d class %04x " gf100_gr_ctxctl_isr()
1154 subc, class, mthd, data); gf100_gr_ctxctl_isr()
1189 u32 subc = (addr & 0x00070000) >> 16; gf100_gr_intr() local
1202 if (device->card_type < NV_E0 || subc < 4) gf100_gr_intr()
1203 class = nvkm_rd32(device, 0x404200 + (subc * 4)); gf100_gr_intr()
1219 "subc %d class %04x mthd %04x data %08x\n", gf100_gr_intr()
1220 chid, inst << 12, name, subc, gf100_gr_intr()
1229 "subc %d class %04x mthd %04x data %08x\n", gf100_gr_intr()
1230 chid, inst << 12, name, subc, class, mthd, data); gf100_gr_intr()
1239 "subc %d class %04x mthd %04x data %08x\n", gf100_gr_intr()
1241 name, subc, class, mthd, data); gf100_gr_intr()
H A Dnv40.c243 u32 subc = (addr & 0x00070000) >> 16; nv40_gr_intr() local
246 u32 class = nvkm_rd32(device, 0x400160 + subc * 4) & 0xffff; nv40_gr_intr()
275 "nstatus %08x [%s] ch %d [%08x %s] subc %d " nv40_gr_intr()
280 subc, class, mthd, data); nv40_gr_intr()
H A Dnv04.c447 int subc = (nvkm_rd32(device, NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7; nv04_gr_set_ctx1() local
456 nvkm_wr32(device, NV04_PGRAPH_CTX_CACHE1 + (subc << 2), tmp); nv04_gr_set_ctx1()
1282 u32 subc = (addr & 0x0000e000) >> 13; nv04_gr_intr() local
1285 u32 class = nvkm_rd32(device, 0x400180 + subc * 4) & 0xff; nv04_gr_intr()
1317 "nstatus %08x [%s] ch %d [%s] subc %d " nv04_gr_intr()
1321 subc, class, mthd, data); nv04_gr_intr()
H A Dnv10.c1091 u32 subc = (addr & 0x00070000) >> 16; nv10_gr_intr() local
1094 u32 class = nvkm_rd32(device, 0x400160 + subc * 4) & 0xfff; nv10_gr_intr()
1125 "nstatus %08x [%s] ch %d [%s] subc %d " nv10_gr_intr()
1129 subc, class, mthd, data); nv10_gr_intr()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dnv04.c111 const int subc = (addr & 0x0000e000) >> 13; nv04_fifo_swmthd() local
113 const u32 mask = 0x0000000f << (subc * 4); nv04_fifo_swmthd()
125 handled = nvkm_sw_mthd(sw, chid, subc, mthd, data); nv04_fifo_swmthd()
164 "ch %d [%s] subc %d mthd %04x data %08x\n", nv04_fifo_cache_error()
H A Dgf100.c367 u32 subc = (addr & 0x00070000) >> 16; gf100_fifo_intr_pbdma() local
376 if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data)) gf100_fifo_intr_pbdma()
385 "subc %d mthd %04x data %08x\n", gf100_fifo_intr_pbdma()
388 subc, mthd, data); gf100_fifo_intr_pbdma()
H A Dgk104.c459 u32 subc = (addr & 0x00070000) >> 16; gk104_fifo_intr_pbdma_0() local
468 if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data)) gk104_fifo_intr_pbdma_0()
478 "subc %d mthd %04x data %08x\n", gk104_fifo_intr_pbdma_0()
481 subc, mthd, data); gk104_fifo_intr_pbdma_0()
/linux-4.4.14/drivers/gpu/drm/i2c/
H A Dch7006_mode.c106 subc, scale, scale_mask, norm_mask, e_hd, e_vd) { \
128 .subc_coeff = subc * fixed1, \
136 subc, scale, scale_mask, norm_mask) \
137 __MODE(f, hd, vd, ht, vt, hsynp, vsynp, subc, scale, \
/linux-4.4.14/arch/sh/lib/
H A Dashiftrt.S80 subc r4,r4
H A Dashrsi3.S112 subc r0,r0
/linux-4.4.14/lib/mpi/
H A Dlonglong.h125 "subc %0,%2,%3" \
462 "subc %5,%4,%1\n" \
463 "subc %3,%2,%0" \
/linux-4.4.14/arch/sh/kernel/
H A Ddisassemble.c215 {"subc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_A}},
/linux-4.4.14/arch/powerpc/xmon/
H A Dppc-opc.c3363 { "subc", XO(31,8,0,0), XO_MASK, PPC, { RT, RB, RA } },
3366 { "subc.", XO(31,8,0,1), XO_MASK, PPCCOM, { RT, RB, RA } },

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