Searched refs:sh_per_se (Results 1 – 4 of 4) sorted by relevance
| /linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v7_0.c | 1918 u32 sh_per_se) in gfx_v7_0_get_rb_disabled() argument
1932 mask = gfx_v7_0_create_bitmask(max_rb_num_per_se / sh_per_se); in gfx_v7_0_get_rb_disabled()
1948 u32 se_num, u32 sh_per_se, in gfx_v7_0_setup_rb() argument
1958 for (j = 0; j < sh_per_se; j++) { in gfx_v7_0_setup_rb()
1960 data = gfx_v7_0_get_rb_disabled(adev, max_rb_num_per_se, sh_per_se); in gfx_v7_0_setup_rb()
1962 disabled_rbs |= data << ((i * sh_per_se + j) * HAWAII_RB_BITMAP_WIDTH_PER_SH); in gfx_v7_0_setup_rb()
1964 disabled_rbs |= data << ((i * sh_per_se + j) * CIK_RB_BITMAP_WIDTH_PER_SH); in gfx_v7_0_setup_rb()
1983 for (j = 0; j < sh_per_se; j++) { in gfx_v7_0_setup_rb()
1994 data |= (RASTER_CONFIG_RB_MAP_0 << (i * sh_per_se + j) * 2); in gfx_v7_0_setup_rb()
1997 data |= (RASTER_CONFIG_RB_MAP_3 << (i * sh_per_se + j) * 2); in gfx_v7_0_setup_rb()
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| D | gfx_v8_0.c | 2762 u32 sh_per_se) in gfx_v8_0_get_rb_disabled() argument
2773 mask = gfx_v8_0_create_bitmask(max_rb_num_per_se / sh_per_se); in gfx_v8_0_get_rb_disabled()
2779 u32 se_num, u32 sh_per_se, in gfx_v8_0_setup_rb() argument
2789 for (j = 0; j < sh_per_se; j++) { in gfx_v8_0_setup_rb()
2792 max_rb_num_per_se, sh_per_se); in gfx_v8_0_setup_rb()
2793 disabled_rbs |= data << ((i * sh_per_se + j) * in gfx_v8_0_setup_rb()
2813 for (j = 0; j < sh_per_se; j++) { in gfx_v8_0_setup_rb()
2825 (i * sh_per_se + j) * 2); in gfx_v8_0_setup_rb()
2829 (i * sh_per_se + j) * 2); in gfx_v8_0_setup_rb()
2834 (i * sh_per_se + j) * 2); in gfx_v8_0_setup_rb()
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| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| D | si.c | 2994 u32 se_num, u32 sh_per_se, in si_setup_spi() argument
3001 for (j = 0; j < sh_per_se; j++) { in si_setup_spi()
3022 u32 sh_per_se) in si_get_rb_disabled() argument
3035 mask = si_create_bitmask(max_rb_num_per_se / sh_per_se); in si_get_rb_disabled()
3041 u32 se_num, u32 sh_per_se, in si_setup_rb() argument
3050 for (j = 0; j < sh_per_se; j++) { in si_setup_rb()
3052 data = si_get_rb_disabled(rdev, max_rb_num_per_se, sh_per_se); in si_setup_rb()
3053 disabled_rbs |= data << ((i * sh_per_se + j) * TAHITI_RB_BITMAP_WIDTH_PER_SH); in si_setup_rb()
3070 for (j = 0; j < sh_per_se; j++) { in si_setup_rb()
3073 data |= (RASTER_CONFIG_RB_MAP_0 << (i * sh_per_se + j) * 2); in si_setup_rb()
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| D | cik.c | 3457 u32 sh_per_se) in cik_get_rb_disabled() argument
3470 mask = cik_create_bitmask(max_rb_num_per_se / sh_per_se); in cik_get_rb_disabled()
3486 u32 se_num, u32 sh_per_se, in cik_setup_rb() argument
3496 for (j = 0; j < sh_per_se; j++) { in cik_setup_rb()
3498 data = cik_get_rb_disabled(rdev, max_rb_num_per_se, sh_per_se); in cik_setup_rb()
3500 disabled_rbs |= data << ((i * sh_per_se + j) * HAWAII_RB_BITMAP_WIDTH_PER_SH); in cik_setup_rb()
3502 disabled_rbs |= data << ((i * sh_per_se + j) * CIK_RB_BITMAP_WIDTH_PER_SH); in cik_setup_rb()
3521 for (j = 0; j < sh_per_se; j++) { in cik_setup_rb()
3530 data |= (RASTER_CONFIG_RB_MAP_0 << (i * sh_per_se + j) * 2); in cik_setup_rb()
3533 data |= (RASTER_CONFIG_RB_MAP_3 << (i * sh_per_se + j) * 2); in cik_setup_rb()
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