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Searched refs:set_parent (Results 1 – 51 of 51) sorted by relevance

/linux-4.4.14/drivers/clk/tegra/
Dclk-periph.c43 return mux_ops->set_parent(mux_hw, index); in clk_periph_set_parent()
115 .set_parent = clk_periph_set_parent,
126 .set_parent = clk_periph_set_parent,
134 .set_parent = clk_periph_set_parent,
Dclk-super.c126 .set_parent = clk_super_set_parent,
/linux-4.4.14/drivers/clk/
Dclk-composite.c43 return mux_ops->set_parent(mux_hw, index); in clk_composite_set_parent()
78 mux_hw && mux_ops && mux_ops->set_parent) { in clk_composite_determine_rate()
221 if (mux_ops->set_parent) in clk_register_composite()
222 clk_composite_ops->set_parent = clk_composite_set_parent; in clk_register_composite()
Dclk-cdce706.c164 .set_parent = cdce706_clkin_set_parent,
380 .set_parent = cdce706_divider_set_parent,
445 .set_parent = cdce706_clkout_set_parent,
Dclk-mux.c109 .set_parent = clk_mux_set_parent,
Dclk.c1207 if (parent && core->ops->set_parent) in __clk_set_parent()
1208 ret = core->ops->set_parent(core->hw, p_index); in __clk_set_parent()
1455 } else if (core->ops->set_parent) { in clk_change_rate()
1456 core->ops->set_parent(core->hw, core->new_parent_index); in clk_change_rate()
1780 if ((core->num_parents > 1) && (!core->ops->set_parent)) { in clk_core_set_parent()
2328 if (core->ops->set_parent && !core->ops->get_parent) { in __clk_init()
2336 !(core->ops->set_parent && core->ops->set_rate)) { in __clk_init()
2647 .set_parent = clk_nodrv_set_parent,
Dclk-gpio.c92 .set_parent = clk_gpio_mux_set_parent,
Dclk-wm831x.c341 .set_parent = wm831x_clkout_set_parent,
Dclk-si5351.c532 .set_parent = si5351_pll_set_parent,
788 .set_parent = si5351_msynth_set_parent,
1105 .set_parent = si5351_clkout_set_parent,
Dclk-qoriq.c673 .set_parent = mux_set_parent,
/linux-4.4.14/arch/avr32/mach-at32ap/
Dclock.c182 if (!clk->set_parent) in clk_set_parent()
186 ret = clk->set_parent(clk, parent); in clk_set_parent()
239 buf, parent->set_parent ? '*' : ' ', in dump_clock()
Dclock.h29 int (*set_parent)(struct clk *clk, struct clk *parent); member
Dat32ap700x.c321 .set_parent = pll1_set_parent,
1458 .set_parent = genclk_set_parent,
2103 .set_parent = genclk_set_parent,
2160 .set_parent = genclk_set_parent,
2168 .set_parent = genclk_set_parent,
2176 .set_parent = genclk_set_parent,
2184 .set_parent = genclk_set_parent,
2192 .set_parent = genclk_set_parent,
/linux-4.4.14/drivers/clk/versatile/
Dclk-sp810.c73 .set_parent = clk_sp810_timerclken_set_parent,
135 init.ops->set_parent(&sp810->timerclken[i].hw, 1); in clk_sp810_of_setup()
/linux-4.4.14/drivers/clk/ti/
Ddpll.c38 .set_parent = &omap3_noncore_dpll_set_parent,
61 .set_parent = &omap3_noncore_dpll_set_parent,
72 .set_parent = &omap3_noncore_dpll_set_parent,
111 .set_parent = &omap3_noncore_dpll_set_parent,
123 .set_parent = &omap3_noncore_dpll_set_parent,
Dmux.c97 .set_parent = ti_clk_mux_set_parent,
/linux-4.4.14/drivers/clk/imx/
Dclk-busy.c143 ret = busy->mux_ops->set_parent(&busy->mux.hw, index); in clk_busy_mux_set_parent()
152 .set_parent = clk_busy_mux_set_parent,
Dclk-fixup-mux.c71 .set_parent = clk_fixup_mux_set_parent,
/linux-4.4.14/drivers/clk/qcom/
Dclk-rcg2.c295 .set_parent = clk_rcg2_set_parent,
501 .set_parent = clk_rcg2_set_parent,
559 .set_parent = clk_rcg2_set_parent,
629 .set_parent = clk_rcg2_set_parent,
719 .set_parent = clk_rcg2_set_parent,
Dclk-regmap-mux.c56 .set_parent = mux_set_parent,
Dclk-rcg.c818 .set_parent = clk_rcg_set_parent,
829 .set_parent = clk_rcg_set_parent,
840 .set_parent = clk_rcg_set_parent,
852 .set_parent = clk_rcg_set_parent,
864 .set_parent = clk_rcg_set_parent,
876 .set_parent = clk_rcg_set_parent,
888 .set_parent = clk_dyn_rcg_set_parent,
Dmmcc-msm8960.c608 .set_parent = pix_rdi_set_parent,
/linux-4.4.14/drivers/sh/clk/
Dcore.c516 if (clk->ops->set_parent) in clk_set_parent()
517 ret = clk->ops->set_parent(clk, parent); in clk_set_parent()
655 if (likely(clkp->ops->set_parent)) in clks_core_resume()
656 clkp->ops->set_parent(clkp, in clks_core_resume()
Dcpg.c333 .set_parent = sh_clk_div6_set_parent,
386 .set_parent = sh_clk_div4_set_parent,
/linux-4.4.14/drivers/clk/pxa/
Dclk-pxa.h23 .set_parent = dummy_clk_set_parent, \
Dclk-pxa.c68 .set_parent = dummy_clk_set_parent,
/linux-4.4.14/drivers/clk/st/
Dclk-flexgen.c95 return clk_mux_ops.set_parent(mux_hw, index); in flexgen_set_parent()
172 .set_parent = flexgen_set_parent,
Dclkgen-mux.c98 ret = clk_mux_ops.set_parent(mux_hw, genamux->muxsel); in clkgena_divmux_enable()
120 clk_mux_ops.set_parent(mux_hw, CKGAX_CLKOPSRC_SWITCH_OFF); in clkgena_divmux_disable()
208 .set_parent = clkgena_divmux_set_parent,
/linux-4.4.14/drivers/clk/rockchip/
Dclk-pll.c191 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3066_pll_set_params()
227 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3066_pll_set_params()
/linux-4.4.14/drivers/clk/at91/
Dclk-smd.c112 .set_parent = at91sam9x5_clk_smd_set_parent,
Dclk-programmable.c171 .set_parent = clk_programmable_set_parent,
Dclk-generated.c202 .set_parent = clk_generated_set_parent,
Dclk-slow.c329 .set_parent = clk_sam9x5_slow_set_parent,
Dclk-usb.c159 .set_parent = at91sam9x5_clk_usb_set_parent,
Dclk-main.c556 .set_parent = clk_sam9x5_main_set_parent,
/linux-4.4.14/drivers/clk/sirf/
Dclk-common.c444 .set_parent = dmn_clk_set_parent,
492 .set_parent = dmn_clk_set_parent,
521 .set_parent = dmn_clk_set_parent,
Dclk-atlas7.c589 .set_parent = dto_clk_set_parent,
/linux-4.4.14/drivers/clk/sunxi/
Dclk-sun6i-ar100.c170 .set_parent = ar100_set_parent,
/linux-4.4.14/drivers/clk/ux500/
Dclk-sysctrl.c113 .set_parent = clk_sysctrl_set_parent,
/linux-4.4.14/include/linux/
Dsh_clk.h29 int (*set_parent)(struct clk *clk, struct clk *parent); member
Dclk-provider.h203 int (*set_parent)(struct clk_hw *hw, u8 index); member
/linux-4.4.14/drivers/clk/berlin/
Dberlin2-div.c233 .set_parent = berlin2_div_set_parent,
/linux-4.4.14/drivers/clk/socfpga/
Dclk-gate.c176 .set_parent = socfpga_clk_set_parent,
/linux-4.4.14/drivers/clk/shmobile/
Dclk-div6.c169 .set_parent = cpg_div6_clock_set_parent,
/linux-4.4.14/arch/mips/alchemy/common/
Dclock.c582 .set_parent = alchemy_clk_fgv1_setp,
723 .set_parent = alchemy_clk_fgv2_setp,
931 .set_parent = alchemy_clk_csrc_setp,
/linux-4.4.14/Documentation/
Dclk.txt76 int (*set_parent)(struct clk_hw *hw, u8 index);
211 .set_parent | | | n | y | n |
/linux-4.4.14/drivers/clk/samsung/
Dclk-s3c2410-dclk.c90 .set_parent = s3c24xx_clkout_set_parent,
/linux-4.4.14/drivers/clk/ingenic/
Djz4780-cgu.c208 .set_parent = jz4780_otg_phy_set_parent,
Dcgu.c487 .set_parent = ingenic_clk_set_parent,
/linux-4.4.14/drivers/clk/mmp/
Dclk-mix.c434 .set_parent = mmp_clk_set_parent,
/linux-4.4.14/drivers/clk/bcm/
Dclk-kona.c1187 .set_parent = kona_peri_clk_set_parent,