H A D | sunsu.c | 162 #define serial_outp(up, offset, value) serial_out(up, offset, value) macro 202 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO); __enable_rsa() 222 serial_outp(up, UART_RSA_FRR, 0); enable_rsa() 245 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO); disable_rsa() 405 serial_outp(up, UART_TX, up->port.x_char); transmit_chars() 628 serial_outp(up, UART_LCR, 0xBF); sunsu_startup() 629 serial_outp(up, UART_EFR, UART_EFR_ECB); sunsu_startup() 630 serial_outp(up, UART_IER, 0); sunsu_startup() 631 serial_outp(up, UART_LCR, 0); sunsu_startup() 633 serial_outp(up, UART_LCR, 0xBF); sunsu_startup() 634 serial_outp(up, UART_EFR, UART_EFR_ECB); sunsu_startup() 635 serial_outp(up, UART_LCR, 0); sunsu_startup() 651 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); sunsu_startup() 652 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | sunsu_startup() 654 serial_outp(up, UART_FCR, 0); sunsu_startup() 691 serial_outp(up, UART_LCR, UART_LCR_WLEN8); sunsu_startup() 706 serial_outp(up, UART_IER, up->ier); sunsu_startup() 739 serial_outp(up, UART_IER, 0); sunsu_shutdown() 756 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | sunsu_shutdown() 759 serial_outp(up, UART_FCR, 0); sunsu_shutdown() 883 serial_outp(up, UART_LCR, 0xBF); sunsu_change_speed() 884 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0); sunsu_change_speed() 886 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ sunsu_change_speed() 887 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */ sunsu_change_speed() 888 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */ sunsu_change_speed() 890 serial_outp(up, UART_FCR, fcr); /* set fcr */ sunsu_change_speed() 891 serial_outp(up, UART_LCR, cval); /* reset DLAB */ sunsu_change_speed() 896 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); sunsu_change_speed() 898 serial_outp(up, UART_FCR, fcr); /* set fcr */ sunsu_change_speed() 1063 serial_outp(up, UART_IER, 0); sunsu_autoconfig() 1068 serial_outp(up, UART_IER, 0x0f); sunsu_autoconfig() 1073 serial_outp(up, UART_IER, scratch); sunsu_autoconfig() 1091 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A); sunsu_autoconfig() 1093 serial_outp(up, UART_MCR, save_mcr); sunsu_autoconfig() 1097 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */ sunsu_autoconfig() 1098 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */ sunsu_autoconfig() 1099 serial_outp(up, UART_LCR, 0); sunsu_autoconfig() 1100 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); sunsu_autoconfig() 1118 serial_outp(up, UART_LCR, UART_LCR_DLAB); sunsu_autoconfig() 1122 serial_outp(up, UART_LCR, 0xBF); sunsu_autoconfig() 1129 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB); sunsu_autoconfig() 1130 serial_outp(up, UART_FCR, sunsu_autoconfig() 1140 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); sunsu_autoconfig() 1141 serial_outp(up, UART_LCR, 0); sunsu_autoconfig() 1142 serial_outp(up, UART_FCR, sunsu_autoconfig() 1148 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); sunsu_autoconfig() 1150 serial_outp(up, UART_LCR, save_lcr); sunsu_autoconfig() 1153 serial_outp(up, UART_SCR, 0xa5); sunsu_autoconfig() 1155 serial_outp(up, UART_SCR, 0x5a); sunsu_autoconfig() 1157 serial_outp(up, UART_SCR, scratch); sunsu_autoconfig() 1174 serial_outp(up, UART_RSA_FRR, 0); sunsu_autoconfig() 1176 serial_outp(up, UART_MCR, save_mcr); sunsu_autoconfig() 1177 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO | sunsu_autoconfig() 1180 serial_outp(up, UART_FCR, 0); sunsu_autoconfig() 1182 serial_outp(up, UART_IER, 0); sunsu_autoconfig()
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