| H A D | rt5677.c | 2 * rt5677.c -- RT5677 ALSA SoC audio codec driver
33 #include "rt5677.h"
34 #include "rt5677-spi.h"
547 * @rt5677: Private Data.
554 static int rt5677_dsp_mode_i2c_write_addr(struct rt5677_priv *rt5677, rt5677_dsp_mode_i2c_write_addr() argument
557 struct snd_soc_codec *codec = rt5677->codec; rt5677_dsp_mode_i2c_write_addr()
560 mutex_lock(&rt5677->dsp_cmd_lock); rt5677_dsp_mode_i2c_write_addr()
562 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_MSB, rt5677_dsp_mode_i2c_write_addr()
569 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_LSB, rt5677_dsp_mode_i2c_write_addr()
576 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_DATA_MSB, rt5677_dsp_mode_i2c_write_addr()
583 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_DATA_LSB, rt5677_dsp_mode_i2c_write_addr()
590 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_OP_CODE, rt5677_dsp_mode_i2c_write_addr()
598 mutex_unlock(&rt5677->dsp_cmd_lock); rt5677_dsp_mode_i2c_write_addr()
605 * rt5677: Private Data.
613 struct rt5677_priv *rt5677, unsigned int addr, unsigned int *value) rt5677_dsp_mode_i2c_read_addr()
615 struct snd_soc_codec *codec = rt5677->codec; rt5677_dsp_mode_i2c_read_addr()
619 mutex_lock(&rt5677->dsp_cmd_lock); rt5677_dsp_mode_i2c_read_addr()
621 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_MSB, rt5677_dsp_mode_i2c_read_addr()
628 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_LSB, rt5677_dsp_mode_i2c_read_addr()
635 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_OP_CODE, rt5677_dsp_mode_i2c_read_addr()
642 regmap_read(rt5677->regmap_physical, RT5677_DSP_I2C_DATA_MSB, &msb); rt5677_dsp_mode_i2c_read_addr()
643 regmap_read(rt5677->regmap_physical, RT5677_DSP_I2C_DATA_LSB, &lsb); rt5677_dsp_mode_i2c_read_addr()
647 mutex_unlock(&rt5677->dsp_cmd_lock); rt5677_dsp_mode_i2c_read_addr()
654 * rt5677: Private Data.
661 static int rt5677_dsp_mode_i2c_write(struct rt5677_priv *rt5677, rt5677_dsp_mode_i2c_write() argument
664 return rt5677_dsp_mode_i2c_write_addr(rt5677, 0x18020000 + reg * 2, rt5677_dsp_mode_i2c_write()
678 struct rt5677_priv *rt5677, unsigned int reg, unsigned int *value) rt5677_dsp_mode_i2c_read()
680 int ret = rt5677_dsp_mode_i2c_read_addr(rt5677, 0x18020000 + reg * 2, rt5677_dsp_mode_i2c_read()
690 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_set_dsp_mode() local
693 regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, 0x2, 0x2); rt5677_set_dsp_mode()
694 rt5677->is_dsp_mode = true; rt5677_set_dsp_mode()
696 regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, 0x2, 0x0); rt5677_set_dsp_mode()
697 rt5677->is_dsp_mode = false; rt5677_set_dsp_mode()
703 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_set_dsp_vad() local
713 regcache_cache_only(rt5677->regmap, false); rt5677_set_dsp_vad()
714 regcache_cache_bypass(rt5677->regmap, true); rt5677_set_dsp_vad()
716 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x1); rt5677_set_dsp_vad()
717 regmap_update_bits(rt5677->regmap, rt5677_set_dsp_vad()
719 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, rt5677_set_dsp_vad()
721 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, rt5677_set_dsp_vad()
723 switch (rt5677->type) { rt5677_set_dsp_vad()
725 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, rt5677_set_dsp_vad()
727 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK2, rt5677_set_dsp_vad()
734 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK2, rt5677_set_dsp_vad()
741 regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x07ff); rt5677_set_dsp_vad()
742 regmap_write(rt5677->regmap, RT5677_PWR_DSP1, 0x07fd); rt5677_set_dsp_vad()
745 ret = request_firmware(&rt5677->fw1, RT5677_FIRMWARE1, rt5677_set_dsp_vad()
748 rt5677_spi_write_firmware(0x50000000, rt5677->fw1); rt5677_set_dsp_vad()
749 release_firmware(rt5677->fw1); rt5677_set_dsp_vad()
752 ret = request_firmware(&rt5677->fw2, RT5677_FIRMWARE2, rt5677_set_dsp_vad()
755 rt5677_spi_write_firmware(0x60000000, rt5677->fw2); rt5677_set_dsp_vad()
756 release_firmware(rt5677->fw2); rt5677_set_dsp_vad()
759 regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, 0x1, 0x0); rt5677_set_dsp_vad()
761 regcache_cache_bypass(rt5677->regmap, false); rt5677_set_dsp_vad()
762 regcache_cache_only(rt5677->regmap, true); rt5677_set_dsp_vad()
766 regcache_cache_only(rt5677->regmap, false); rt5677_set_dsp_vad()
767 regcache_cache_bypass(rt5677->regmap, true); rt5677_set_dsp_vad()
769 regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, 0x1, 0x1); rt5677_set_dsp_vad()
771 regmap_write(rt5677->regmap, RT5677_PWR_DSP1, 0x0001); rt5677_set_dsp_vad()
773 regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec); rt5677_set_dsp_vad()
775 regcache_cache_bypass(rt5677->regmap, false); rt5677_set_dsp_vad()
776 regcache_mark_dirty(rt5677->regmap); rt5677_set_dsp_vad()
777 regcache_sync(rt5677->regmap); rt5677_set_dsp_vad()
805 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); rt5677_dsp_vad_get() local
807 ucontrol->value.integer.value[0] = rt5677->dsp_vad_en; rt5677_dsp_vad_get()
816 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); rt5677_dsp_vad_put() local
819 rt5677->dsp_vad_en = !!ucontrol->value.integer.value[0]; rt5677_dsp_vad_put()
822 rt5677_set_dsp_vad(codec, rt5677->dsp_vad_en); rt5677_dsp_vad_put()
917 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); set_dmic_clk() local
920 rate = rt5677->sysclk / rl6231_get_pre_div(rt5677->regmap, set_dmic_clk()
926 regmap_update_bits(rt5677->regmap, RT5677_DMIC_CTRL1, set_dmic_clk()
935 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); is_sys_clk_from_pll() local
938 regmap_read(rt5677->regmap, RT5677_GLB_CLK1, &val); is_sys_clk_from_pll()
950 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); is_using_asrc() local
1017 regmap_read(rt5677->regmap, reg, &val); is_using_asrc()
1033 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); can_use_asrc() local
1035 if (rt5677->sysclk > rt5677->lrck[RT5677_AIF1] * 384) can_use_asrc()
1058 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_sel_asrc_clk_src() local
1106 regmap_update_bits(rt5677->regmap, RT5677_ASRC_3, asrc3_mask, rt5677_sel_asrc_clk_src()
1135 regmap_update_bits(rt5677->regmap, RT5677_ASRC_4, asrc4_mask, rt5677_sel_asrc_clk_src()
1164 regmap_update_bits(rt5677->regmap, RT5677_ASRC_5, asrc5_mask, rt5677_sel_asrc_clk_src()
1181 regmap_update_bits(rt5677->regmap, RT5677_ASRC_6, asrc6_mask, rt5677_sel_asrc_clk_src()
1198 regmap_update_bits(rt5677->regmap, RT5677_ASRC_7, asrc7_mask, rt5677_sel_asrc_clk_src()
1227 regmap_update_bits(rt5677->regmap, RT5677_ASRC_8, asrc8_mask, rt5677_sel_asrc_clk_src()
1238 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_dmic_use_asrc() local
1243 regmap_read(rt5677->regmap, RT5677_ASRC_5, &asrc_setting); rt5677_dmic_use_asrc()
1252 regmap_read(rt5677->regmap, RT5677_ASRC_5, &asrc_setting); rt5677_dmic_use_asrc()
1261 regmap_read(rt5677->regmap, RT5677_ASRC_5, &asrc_setting); rt5677_dmic_use_asrc()
1270 regmap_read(rt5677->regmap, RT5677_ASRC_5, &asrc_setting); rt5677_dmic_use_asrc()
1279 regmap_read(rt5677->regmap, RT5677_ASRC_6, &asrc_setting); rt5677_dmic_use_asrc()
1288 regmap_read(rt5677->regmap, RT5677_ASRC_6, &asrc_setting); rt5677_dmic_use_asrc()
2413 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_bst1_event() local
2417 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, rt5677_bst1_event()
2422 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, rt5677_bst1_event()
2437 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_bst2_event() local
2441 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, rt5677_bst2_event()
2446 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, rt5677_bst2_event()
2461 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_set_pll1_event() local
2465 regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x2); rt5677_set_pll1_event()
2469 regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x0); rt5677_set_pll1_event()
2483 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_set_pll2_event() local
2487 regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x2); rt5677_set_pll2_event()
2491 regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x0); rt5677_set_pll2_event()
2505 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_set_micbias1_event() local
2509 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, rt5677_set_micbias1_event()
2516 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, rt5677_set_micbias1_event()
2532 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_if1_adc_tdm_event() local
2537 regmap_read(rt5677->regmap, RT5677_TDM1_CTRL2, &value); rt5677_if1_adc_tdm_event()
2539 regmap_update_bits(rt5677->regmap, RT5677_TDM1_CTRL1, rt5677_if1_adc_tdm_event()
2555 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_if2_adc_tdm_event() local
2560 regmap_read(rt5677->regmap, RT5677_TDM2_CTRL2, &value); rt5677_if2_adc_tdm_event()
2562 regmap_update_bits(rt5677->regmap, RT5677_TDM2_CTRL1, rt5677_if2_adc_tdm_event()
2578 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_vref_event() local
2583 !rt5677->is_vref_slow) { rt5677_vref_event()
2585 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, rt5677_vref_event()
2588 rt5677->is_vref_slow = true; rt5677_vref_event()
4118 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_hw_params() local
4122 rt5677->lrck[dai->id] = params_rate(params); rt5677_hw_params()
4123 pre_div = rl6231_get_clk_info(rt5677->sysclk, rt5677->lrck[dai->id]); rt5677_hw_params()
4126 rt5677->sysclk, rt5677->lrck[dai->id]); rt5677_hw_params()
4135 rt5677->bclk[dai->id] = rt5677->lrck[dai->id] * (32 << bclk_ms); rt5677_hw_params()
4138 rt5677->bclk[dai->id], rt5677->lrck[dai->id]); rt5677_hw_params()
4162 regmap_update_bits(rt5677->regmap, RT5677_I2S1_SDP, rt5677_hw_params()
4164 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1, rt5677_hw_params()
4170 regmap_update_bits(rt5677->regmap, RT5677_I2S2_SDP, rt5677_hw_params()
4172 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1, rt5677_hw_params()
4179 regmap_update_bits(rt5677->regmap, RT5677_I2S3_SDP, rt5677_hw_params()
4181 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1, rt5677_hw_params()
4188 regmap_update_bits(rt5677->regmap, RT5677_I2S4_SDP, rt5677_hw_params()
4190 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1, rt5677_hw_params()
4203 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_set_dai_fmt() local
4208 rt5677->master[dai->id] = 1; rt5677_set_dai_fmt()
4212 rt5677->master[dai->id] = 0; rt5677_set_dai_fmt()
4246 regmap_update_bits(rt5677->regmap, RT5677_I2S1_SDP, rt5677_set_dai_fmt()
4251 regmap_update_bits(rt5677->regmap, RT5677_I2S2_SDP, rt5677_set_dai_fmt()
4256 regmap_update_bits(rt5677->regmap, RT5677_I2S3_SDP, rt5677_set_dai_fmt()
4261 regmap_update_bits(rt5677->regmap, RT5677_I2S4_SDP, rt5677_set_dai_fmt()
4277 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_set_dai_sysclk() local
4280 if (freq == rt5677->sysclk && clk_id == rt5677->sysclk_src) rt5677_set_dai_sysclk()
4297 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, rt5677_set_dai_sysclk()
4299 rt5677->sysclk = freq; rt5677_set_dai_sysclk()
4300 rt5677->sysclk_src = clk_id; rt5677_set_dai_sysclk()
4330 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_set_dai_pll() local
4334 if (source == rt5677->pll_src && freq_in == rt5677->pll_in && rt5677_set_dai_pll()
4335 freq_out == rt5677->pll_out) rt5677_set_dai_pll()
4341 rt5677->pll_in = 0; rt5677_set_dai_pll()
4342 rt5677->pll_out = 0; rt5677_set_dai_pll()
4343 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, rt5677_set_dai_pll()
4350 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, rt5677_set_dai_pll()
4359 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, rt5677_set_dai_pll()
4363 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, rt5677_set_dai_pll()
4367 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, rt5677_set_dai_pll()
4371 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, rt5677_set_dai_pll()
4393 regmap_write(rt5677->regmap, RT5677_PLL1_CTRL1, rt5677_set_dai_pll()
4395 regmap_write(rt5677->regmap, RT5677_PLL1_CTRL2, rt5677_set_dai_pll()
4399 rt5677->pll_in = freq_in; rt5677_set_dai_pll()
4400 rt5677->pll_out = freq_out; rt5677_set_dai_pll()
4401 rt5677->pll_src = source; rt5677_set_dai_pll()
4410 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_set_tdm_slot() local
4450 regmap_update_bits(rt5677->regmap, RT5677_TDM1_CTRL1, 0x1f00, rt5677_set_tdm_slot()
4452 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x8000, rt5677_set_tdm_slot()
4456 regmap_update_bits(rt5677->regmap, RT5677_TDM2_CTRL1, 0x1f00, rt5677_set_tdm_slot()
4458 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x80, rt5677_set_tdm_slot()
4471 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_set_bias_level() local
4481 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, rt5677_set_bias_level()
4484 regmap_update_bits(rt5677->regmap, rt5677_set_bias_level()
4487 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, rt5677_set_bias_level()
4493 rt5677->is_vref_slow = false; rt5677_set_bias_level()
4494 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, rt5677_set_bias_level()
4496 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, rt5677_set_bias_level()
4505 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x0); rt5677_set_bias_level()
4506 regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000); rt5677_set_bias_level()
4507 regmap_write(rt5677->regmap, RT5677_PWR_DIG2, 0x0000); rt5677_set_bias_level()
4508 regmap_write(rt5677->regmap, RT5677_PWR_ANLG1, 0x0022); rt5677_set_bias_level()
4509 regmap_write(rt5677->regmap, RT5677_PWR_ANLG2, 0x0000); rt5677_set_bias_level()
4510 regmap_update_bits(rt5677->regmap, rt5677_set_bias_level()
4513 if (rt5677->dsp_vad_en) rt5677_set_bias_level()
4532 struct rt5677_priv *rt5677 = gpio_to_rt5677(chip); rt5677_gpio_set() local
4536 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2, rt5677_gpio_set()
4541 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL3, rt5677_gpio_set()
4553 struct rt5677_priv *rt5677 = gpio_to_rt5677(chip); rt5677_gpio_direction_out() local
4557 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2, rt5677_gpio_direction_out()
4563 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL3, rt5677_gpio_direction_out()
4577 struct rt5677_priv *rt5677 = gpio_to_rt5677(chip); rt5677_gpio_get() local
4580 ret = regmap_read(rt5677->regmap, RT5677_GPIO_ST, &value); rt5677_gpio_get()
4589 struct rt5677_priv *rt5677 = gpio_to_rt5677(chip); rt5677_gpio_direction_in() local
4593 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2, rt5677_gpio_direction_in()
4598 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL3, rt5677_gpio_direction_in()
4614 static void rt5677_gpio_config(struct rt5677_priv *rt5677, unsigned offset, rt5677_gpio_config() argument
4622 regmap_update_bits(rt5677->regmap, rt5677_gpio_config()
4630 regmap_update_bits(rt5677->regmap, rt5677_gpio_config()
4643 struct rt5677_priv *rt5677 = gpio_to_rt5677(chip); rt5677_to_irq() local
4644 struct regmap_irq_chip_data *data = rt5677->irq_data; rt5677_to_irq()
4648 if ((rt5677->pdata.jd1_gpio == 1 && offset == RT5677_GPIO1) || rt5677_to_irq()
4649 (rt5677->pdata.jd1_gpio == 2 && rt5677_to_irq()
4651 (rt5677->pdata.jd1_gpio == 3 && rt5677_to_irq()
4660 if ((rt5677->pdata.jd2_gpio == 1 && offset == RT5677_GPIO4) || rt5677_to_irq()
4661 (rt5677->pdata.jd2_gpio == 2 && rt5677_to_irq()
4663 (rt5677->pdata.jd2_gpio == 3 && rt5677_to_irq()
4666 } else if ((rt5677->pdata.jd3_gpio == 1 && rt5677_to_irq()
4668 (rt5677->pdata.jd3_gpio == 2 && rt5677_to_irq()
4670 (rt5677->pdata.jd3_gpio == 3 && rt5677_to_irq()
4682 .label = "rt5677",
4694 struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c); rt5677_init_gpio() local
4697 rt5677->gpio_chip = rt5677_template_chip; rt5677_init_gpio()
4698 rt5677->gpio_chip.ngpio = RT5677_GPIO_NUM; rt5677_init_gpio()
4699 rt5677->gpio_chip.dev = &i2c->dev; rt5677_init_gpio()
4700 rt5677->gpio_chip.base = -1; rt5677_init_gpio()
4702 ret = gpiochip_add(&rt5677->gpio_chip); rt5677_init_gpio()
4709 struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c); rt5677_free_gpio() local
4711 gpiochip_remove(&rt5677->gpio_chip); rt5677_free_gpio()
4714 static void rt5677_gpio_config(struct rt5677_priv *rt5677, unsigned offset, rt5677_gpio_config() argument
4731 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_probe() local
4734 rt5677->codec = codec; rt5677_probe()
4736 if (rt5677->pdata.dmic2_clk_pin == RT5677_DMIC_CLK2) { rt5677_probe()
4748 regmap_write(rt5677->regmap, RT5677_DIG_MISC, 0x0020); rt5677_probe()
4749 regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x0c00); rt5677_probe()
4752 rt5677_gpio_config(rt5677, i, rt5677->pdata.gpio_config[i]); rt5677_probe()
4754 if (rt5677->irq_data) { rt5677_probe()
4755 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL1, 0x8000, rt5677_probe()
4757 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x0018, rt5677_probe()
4760 if (rt5677->pdata.jd1_gpio) rt5677_probe()
4761 regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1, rt5677_probe()
4763 rt5677->pdata.jd1_gpio << rt5677_probe()
4766 if (rt5677->pdata.jd2_gpio) rt5677_probe()
4767 regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1, rt5677_probe()
4769 rt5677->pdata.jd2_gpio << rt5677_probe()
4772 if (rt5677->pdata.jd3_gpio) rt5677_probe()
4773 regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1, rt5677_probe()
4775 rt5677->pdata.jd3_gpio << rt5677_probe()
4779 mutex_init(&rt5677->dsp_cmd_lock); rt5677_probe()
4780 mutex_init(&rt5677->dsp_pri_lock); rt5677_probe()
4787 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_remove() local
4789 regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec); rt5677_remove()
4790 gpiod_set_value_cansleep(rt5677->pow_ldo2, 0); rt5677_remove()
4791 gpiod_set_value_cansleep(rt5677->reset_pin, 0); rt5677_remove()
4799 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_suspend() local
4801 if (!rt5677->dsp_vad_en) { rt5677_suspend()
4802 regcache_cache_only(rt5677->regmap, true); rt5677_suspend()
4803 regcache_mark_dirty(rt5677->regmap); rt5677_suspend()
4805 gpiod_set_value_cansleep(rt5677->pow_ldo2, 0); rt5677_suspend()
4806 gpiod_set_value_cansleep(rt5677->reset_pin, 0); rt5677_suspend()
4814 struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); rt5677_resume() local
4816 if (!rt5677->dsp_vad_en) { rt5677_resume()
4817 gpiod_set_value_cansleep(rt5677->pow_ldo2, 1); rt5677_resume()
4818 gpiod_set_value_cansleep(rt5677->reset_pin, 1); rt5677_resume()
4819 if (rt5677->pow_ldo2 || rt5677->reset_pin) rt5677_resume()
4822 regcache_cache_only(rt5677->regmap, false); rt5677_resume()
4823 regcache_sync(rt5677->regmap); rt5677_resume()
4836 struct rt5677_priv *rt5677 = i2c_get_clientdata(client); rt5677_read() local
4838 if (rt5677->is_dsp_mode) { rt5677_read()
4840 mutex_lock(&rt5677->dsp_pri_lock); rt5677_read()
4841 rt5677_dsp_mode_i2c_write(rt5677, RT5677_PRIV_INDEX, rt5677_read()
4843 rt5677_dsp_mode_i2c_read(rt5677, RT5677_PRIV_DATA, val); rt5677_read()
4844 mutex_unlock(&rt5677->dsp_pri_lock); rt5677_read()
4846 rt5677_dsp_mode_i2c_read(rt5677, reg, val); rt5677_read()
4849 regmap_read(rt5677->regmap_physical, reg, val); rt5677_read()
4858 struct rt5677_priv *rt5677 = i2c_get_clientdata(client); rt5677_write() local
4860 if (rt5677->is_dsp_mode) { rt5677_write()
4862 mutex_lock(&rt5677->dsp_pri_lock); rt5677_write()
4863 rt5677_dsp_mode_i2c_write(rt5677, RT5677_PRIV_INDEX, rt5677_write()
4865 rt5677_dsp_mode_i2c_write(rt5677, RT5677_PRIV_DATA, rt5677_write()
4867 mutex_unlock(&rt5677->dsp_pri_lock); rt5677_write()
4869 rt5677_dsp_mode_i2c_write(rt5677, reg, val); rt5677_write()
4872 regmap_write(rt5677->regmap_physical, reg, val); rt5677_write()
4892 .name = "rt5677-aif1",
4911 .name = "rt5677-aif2",
4930 .name = "rt5677-aif3",
4949 .name = "rt5677-aif4",
4968 .name = "rt5677-slimbus",
5037 { "rt5677", RT5677 },
5043 static void rt5677_read_device_properties(struct rt5677_priv *rt5677, rt5677_read_device_properties() argument
5046 rt5677->pdata.in1_diff = device_property_read_bool(dev, rt5677_read_device_properties()
5048 rt5677->pdata.in2_diff = device_property_read_bool(dev, rt5677_read_device_properties()
5050 rt5677->pdata.lout1_diff = device_property_read_bool(dev, rt5677_read_device_properties()
5052 rt5677->pdata.lout2_diff = device_property_read_bool(dev, rt5677_read_device_properties()
5054 rt5677->pdata.lout3_diff = device_property_read_bool(dev, rt5677_read_device_properties()
5058 rt5677->pdata.gpio_config, RT5677_GPIO_NUM); rt5677_read_device_properties()
5061 &rt5677->pdata.jd1_gpio); rt5677_read_device_properties()
5063 &rt5677->pdata.jd2_gpio); rt5677_read_device_properties()
5065 &rt5677->pdata.jd3_gpio); rt5677_read_device_properties()
5084 .name = "rt5677",
5097 struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c); rt5677_init_irq() local
5099 if (!rt5677->pdata.jd1_gpio && rt5677_init_irq()
5100 !rt5677->pdata.jd2_gpio && rt5677_init_irq()
5101 !rt5677->pdata.jd3_gpio) rt5677_init_irq()
5109 ret = regmap_add_irq_chip(rt5677->regmap, i2c->irq, rt5677_init_irq()
5111 &rt5677_irq_chip, &rt5677->irq_data); rt5677_init_irq()
5123 struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c); rt5677_free_irq() local
5125 if (rt5677->irq_data) rt5677_free_irq()
5126 regmap_del_irq_chip(i2c->irq, rt5677->irq_data); rt5677_free_irq()
5133 struct rt5677_priv *rt5677; rt5677_i2c_probe() local
5137 rt5677 = devm_kzalloc(&i2c->dev, sizeof(struct rt5677_priv), rt5677_i2c_probe()
5139 if (rt5677 == NULL) rt5677_i2c_probe()
5142 i2c_set_clientdata(i2c, rt5677); rt5677_i2c_probe()
5144 rt5677->type = id->driver_data; rt5677_i2c_probe()
5147 rt5677->pdata = *pdata; rt5677_i2c_probe()
5149 rt5677_read_device_properties(rt5677, &i2c->dev); rt5677_i2c_probe()
5155 rt5677->pow_ldo2 = devm_gpiod_get_optional(&i2c->dev, rt5677_i2c_probe()
5157 if (IS_ERR(rt5677->pow_ldo2)) { rt5677_i2c_probe()
5158 ret = PTR_ERR(rt5677->pow_ldo2); rt5677_i2c_probe()
5162 rt5677->reset_pin = devm_gpiod_get_optional(&i2c->dev, rt5677_i2c_probe()
5164 if (IS_ERR(rt5677->reset_pin)) { rt5677_i2c_probe()
5165 ret = PTR_ERR(rt5677->reset_pin); rt5677_i2c_probe()
5170 if (rt5677->pow_ldo2 || rt5677->reset_pin) { rt5677_i2c_probe()
5178 rt5677->regmap_physical = devm_regmap_init_i2c(i2c, rt5677_i2c_probe()
5180 if (IS_ERR(rt5677->regmap_physical)) { rt5677_i2c_probe()
5181 ret = PTR_ERR(rt5677->regmap_physical); rt5677_i2c_probe()
5187 rt5677->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt5677_regmap); rt5677_i2c_probe()
5188 if (IS_ERR(rt5677->regmap)) { rt5677_i2c_probe()
5189 ret = PTR_ERR(rt5677->regmap); rt5677_i2c_probe()
5195 regmap_read(rt5677->regmap, RT5677_VENDOR_ID2, &val); rt5677_i2c_probe()
5198 "Device with ID register %#x is not rt5677\n", val); rt5677_i2c_probe()
5202 regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec); rt5677_i2c_probe()
5204 ret = regmap_register_patch(rt5677->regmap, init_list, rt5677_i2c_probe()
5209 if (rt5677->pdata.in1_diff) rt5677_i2c_probe()
5210 regmap_update_bits(rt5677->regmap, RT5677_IN1, rt5677_i2c_probe()
5213 if (rt5677->pdata.in2_diff) rt5677_i2c_probe()
5214 regmap_update_bits(rt5677->regmap, RT5677_IN1, rt5677_i2c_probe()
5217 if (rt5677->pdata.lout1_diff) rt5677_i2c_probe()
5218 regmap_update_bits(rt5677->regmap, RT5677_LOUT1, rt5677_i2c_probe()
5221 if (rt5677->pdata.lout2_diff) rt5677_i2c_probe()
5222 regmap_update_bits(rt5677->regmap, RT5677_LOUT1, rt5677_i2c_probe()
5225 if (rt5677->pdata.lout3_diff) rt5677_i2c_probe()
5226 regmap_update_bits(rt5677->regmap, RT5677_LOUT1, rt5677_i2c_probe()
5229 if (rt5677->pdata.dmic2_clk_pin == RT5677_DMIC_CLK2) { rt5677_i2c_probe()
5230 regmap_update_bits(rt5677->regmap, RT5677_GEN_CTRL2, rt5677_i2c_probe()
5233 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2, rt5677_i2c_probe()
5238 if (rt5677->pdata.micbias1_vdd_3v3) rt5677_i2c_probe()
5239 regmap_update_bits(rt5677->regmap, RT5677_MICBIAS, rt5677_i2c_probe()
5261 .name = "rt5677",
612 rt5677_dsp_mode_i2c_read_addr( struct rt5677_priv *rt5677, unsigned int addr, unsigned int *value) rt5677_dsp_mode_i2c_read_addr() argument
677 rt5677_dsp_mode_i2c_read( struct rt5677_priv *rt5677, unsigned int reg, unsigned int *value) rt5677_dsp_mode_i2c_read() argument
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