Searched refs:reg_sel (Results 1 - 2 of 2) sorted by relevance

/linux-4.4.14/drivers/clk/ux500/
H A Dclk-sysctrl.c27 u16 reg_sel[SYSCTRL_MAX_NUM_PARENTS]; member in struct:clk_sysctrl
41 ret = ab8500_sysctrl_write(clk->reg_sel[0], clk->reg_mask[0], clk_sysctrl_prepare()
53 if (ab8500_sysctrl_clear(clk->reg_sel[0], clk->reg_mask[0])) clk_sysctrl_unprepare()
71 if (clk->reg_sel[old_index]) { clk_sysctrl_set_parent()
72 ret = ab8500_sysctrl_clear(clk->reg_sel[old_index], clk_sysctrl_set_parent()
78 if (clk->reg_sel[index]) { clk_sysctrl_set_parent()
79 ret = ab8500_sysctrl_write(clk->reg_sel[index], clk_sysctrl_set_parent()
83 if (clk->reg_sel[old_index]) clk_sysctrl_set_parent()
84 ab8500_sysctrl_write(clk->reg_sel[old_index], clk_sysctrl_set_parent()
121 u16 *reg_sel, clk_reg_sysctrl()
149 clk->reg_sel[0] = reg_sel[0]; clk_reg_sysctrl()
155 clk->reg_sel[i] = reg_sel[i]; clk_reg_sysctrl()
182 u16 reg_sel, clk_reg_sysctrl_gate()
192 &reg_sel, &reg_mask, &reg_bits, 0, enable_delay_us, clk_reg_sysctrl_gate()
199 u16 reg_sel, clk_reg_sysctrl_gate_fixed_rate()
210 &reg_sel, &reg_mask, &reg_bits, clk_reg_sysctrl_gate_fixed_rate()
219 u16 *reg_sel, clk_reg_sysctrl_set_parent()
225 reg_sel, reg_mask, reg_bits, 0, 0, flags, clk_reg_sysctrl_set_parent()
117 clk_reg_sysctrl(struct device *dev, const char *name, const char **parent_names, u8 num_parents, u16 *reg_sel, u8 *reg_mask, u8 *reg_bits, unsigned long rate, unsigned long enable_delay_us, unsigned long flags, struct clk_ops *clk_sysctrl_ops) clk_reg_sysctrl() argument
179 clk_reg_sysctrl_gate(struct device *dev, const char *name, const char *parent_name, u16 reg_sel, u8 reg_mask, u8 reg_bits, unsigned long enable_delay_us, unsigned long flags) clk_reg_sysctrl_gate() argument
196 clk_reg_sysctrl_gate_fixed_rate(struct device *dev, const char *name, const char *parent_name, u16 reg_sel, u8 reg_mask, u8 reg_bits, unsigned long rate, unsigned long enable_delay_us, unsigned long flags) clk_reg_sysctrl_gate_fixed_rate() argument
215 clk_reg_sysctrl_set_parent(struct device *dev, const char *name, const char **parent_names, u8 num_parents, u16 *reg_sel, u8 *reg_mask, u8 *reg_bits, unsigned long flags) clk_reg_sysctrl_set_parent() argument
H A Dclk.h66 u16 reg_sel,
75 u16 reg_sel,
86 u16 *reg_sel,

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