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Searched refs:reg32 (Results 1 – 19 of 19) sorted by relevance

/linux-4.4.14/drivers/pci/pcie/aer/
Decrc.c52 u32 reg32; in enable_ecrc_checking() local
61 pci_read_config_dword(dev, pos + PCI_ERR_CAP, &reg32); in enable_ecrc_checking()
62 if (reg32 & PCI_ERR_CAP_ECRC_GENC) in enable_ecrc_checking()
63 reg32 |= PCI_ERR_CAP_ECRC_GENE; in enable_ecrc_checking()
64 if (reg32 & PCI_ERR_CAP_ECRC_CHKC) in enable_ecrc_checking()
65 reg32 |= PCI_ERR_CAP_ECRC_CHKE; in enable_ecrc_checking()
66 pci_write_config_dword(dev, pos + PCI_ERR_CAP, reg32); in enable_ecrc_checking()
80 u32 reg32; in disable_ecrc_checking() local
89 pci_read_config_dword(dev, pos + PCI_ERR_CAP, &reg32); in disable_ecrc_checking()
90 reg32 &= ~(PCI_ERR_CAP_ECRC_GENE | PCI_ERR_CAP_ECRC_CHKE); in disable_ecrc_checking()
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Daerdrv.c127 u32 reg32; in aer_enable_rootport() local
139 pci_read_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, &reg32); in aer_enable_rootport()
140 pci_write_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, reg32); in aer_enable_rootport()
141 pci_read_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, &reg32); in aer_enable_rootport()
142 pci_write_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, reg32); in aer_enable_rootport()
143 pci_read_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, &reg32); in aer_enable_rootport()
144 pci_write_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, reg32); in aer_enable_rootport()
153 pci_read_config_dword(pdev, aer_pos + PCI_ERR_ROOT_COMMAND, &reg32); in aer_enable_rootport()
154 reg32 |= ROOT_PORT_INTR_ON_MESG_MASK; in aer_enable_rootport()
155 pci_write_config_dword(pdev, aer_pos + PCI_ERR_ROOT_COMMAND, reg32); in aer_enable_rootport()
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/linux-4.4.14/drivers/pci/pcie/
Daspm.c153 u32 reg32; in pcie_clkpm_cap_init() local
160 pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &reg32); in pcie_clkpm_cap_init()
161 if (!(reg32 & PCI_EXP_LNKCAP_CLKPM)) { in pcie_clkpm_cap_init()
292 u32 reg32; in pcie_get_aspm_reg() local
294 pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &reg32); in pcie_get_aspm_reg()
295 info->support = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10; in pcie_get_aspm_reg()
296 info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12; in pcie_get_aspm_reg()
297 info->latency_encoding_l1 = (reg32 & PCI_EXP_LNKCAP_L1EL) >> 15; in pcie_get_aspm_reg()
404 u32 reg32, encoding; in pcie_aspm_cap_init() local
412 pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32); in pcie_aspm_cap_init()
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Dportdrv_core.c80 u32 reg32; in pcie_port_enable_msix() local
150 pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32); in pcie_port_enable_msix()
151 entry = reg32 >> 27; in pcie_port_enable_msix()
257 u32 reg32; in get_port_device_capability() local
278 pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32); in get_port_device_capability()
279 if (reg32 & PCI_EXP_SLTCAP_HPC) { in get_port_device_capability()
/linux-4.4.14/drivers/net/wireless/ath/ath9k/
Dar9002_phy.c69 u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; in ar9002_hw_set_channel() local
76 reg32 = REG_READ(ah, AR_PHY_SYNTH_CONTROL); in ar9002_hw_set_channel()
77 reg32 &= 0xc0000000; in ar9002_hw_set_channel()
148 reg32 = reg32 | in ar9002_hw_set_channel()
152 REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32); in ar9002_hw_set_channel()
Dar5008_phy.c91 static void ar5008_hw_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32, in ar5008_hw_phy_modify_rx_buffer() argument
98 tmp32 = ath9k_hw_reverse_bits(reg32, numBits); in ar5008_hw_phy_modify_rx_buffer()
191 u32 reg32 = 0; in ar5008_hw_set_channel() local
246 reg32 = in ar5008_hw_set_channel()
250 REG_WRITE(ah, AR_PHY(0x37), reg32); in ar5008_hw_set_channel()
Dar9003_phy.c151 u32 freq, chan_frac, div, channelSel = 0, reg32 = 0; in ar9003_hw_set_channel() local
222 reg32 = (bMode << 29); in ar9003_hw_set_channel()
223 REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32); in ar9003_hw_set_channel()
230 reg32 = (channelSel << 2) | (fracMode << 30) | in ar9003_hw_set_channel()
232 REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32); in ar9003_hw_set_channel()
236 reg32 = (channelSel << 2) | (fracMode << 30) | in ar9003_hw_set_channel()
238 REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32); in ar9003_hw_set_channel()
Deeprom_4k.c364 u32 reg32, regOffset, regChainOffset; in ath9k_hw_set_4k_power_cal_table() local
430 reg32 = get_unaligned_le32(&pdadcValues[4 * j]); in ath9k_hw_set_4k_power_cal_table()
431 REG_WRITE(ah, regOffset, reg32); in ath9k_hw_set_4k_power_cal_table()
436 reg32); in ath9k_hw_set_4k_power_cal_table()
Deeprom_def.c823 u32 reg32, regOffset, regChainOffset; in ath9k_hw_set_def_power_cal_table() local
941 reg32 = get_unaligned_le32(&pdadcValues[4 * j]); in ath9k_hw_set_def_power_cal_table()
942 REG_WRITE(ah, regOffset, reg32); in ath9k_hw_set_def_power_cal_table()
947 reg32); in ath9k_hw_set_def_power_cal_table()
Deeprom_9287.c420 u32 reg32, regOffset, regChainOffset, regval; in ath9k_hw_set_ar9287_power_cal_table() local
536 reg32 = get_unaligned_le32(&pdadcValues[4 * j]); in ath9k_hw_set_ar9287_power_cal_table()
538 REG_WRITE(ah, regOffset, reg32); in ath9k_hw_set_ar9287_power_cal_table()
/linux-4.4.14/drivers/pci/
Dprobe.c1052 u32 reg32; in set_pcie_hotplug_bridge() local
1054 pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &reg32); in set_pcie_hotplug_bridge()
1055 if (reg32 & PCI_EXP_SLTCAP_HPC) in set_pcie_hotplug_bridge()
1421 u32 reg32; in program_hpp_type2() local
1457 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &reg32); in program_hpp_type2()
1458 reg32 = (reg32 & hpp->unc_err_mask_and) | hpp->unc_err_mask_or; in program_hpp_type2()
1459 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, reg32); in program_hpp_type2()
1462 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &reg32); in program_hpp_type2()
1463 reg32 = (reg32 & hpp->unc_err_sever_and) | hpp->unc_err_sever_or; in program_hpp_type2()
1464 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, reg32); in program_hpp_type2()
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/linux-4.4.14/drivers/ipack/carriers/
Dtpci200.c518 u32 reg32; in tpci200_pci_probe() local
552 reg32 = ioread32(tpci200->info->cfg_regs + LAS1_DESC); in tpci200_pci_probe()
553 reg32 |= 1 << LAS_BIT_BIGENDIAN; in tpci200_pci_probe()
554 iowrite32(reg32, tpci200->info->cfg_regs + LAS1_DESC); in tpci200_pci_probe()
556 reg32 = ioread32(tpci200->info->cfg_regs + LAS2_DESC); in tpci200_pci_probe()
557 reg32 |= 1 << LAS_BIT_BIGENDIAN; in tpci200_pci_probe()
558 iowrite32(reg32, tpci200->info->cfg_regs + LAS2_DESC); in tpci200_pci_probe()
/linux-4.4.14/drivers/staging/rdma/hfi1/
Dpcie.c875 u32 reg32, fs, lf; in do_pcie_gen3_transition() local
990 reg32 = 0x10ul << PCIE_CFG_REG_PL2_LOW_PWR_ENT_CNT_SHIFT; in do_pcie_gen3_transition()
991 pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL2, reg32); in do_pcie_gen3_transition()
1000 reg32 = PCIE_CFG_REG_PL100_EQ_EIEOS_CNT_SMASK; in do_pcie_gen3_transition()
1001 pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL100, reg32); in do_pcie_gen3_transition()
1208 pci_read_config_dword(dd->pcidev, PCIE_CFG_SPCIE2, &reg32); in do_pcie_gen3_transition()
1209 dd_dev_info(dd, "%s: per-lane errors: 0x%x\n", __func__, reg32); in do_pcie_gen3_transition()
/linux-4.4.14/drivers/pci/hotplug/
Dacpiphp_glue.c228 u32 reg32; in device_is_managed_by_native_pciehp() local
233 if (pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &reg32)) in device_is_managed_by_native_pciehp()
235 if (!(reg32 & PCI_EXP_SLTCAP_HPC)) in device_is_managed_by_native_pciehp()
/linux-4.4.14/kernel/debug/kdb/
Dkdb_main.c1833 u32 reg32; in kdb_rd() local
1864 rname = dbg_get_reg(i, &reg32, kdb_current_regs); in kdb_rd()
1867 len += kdb_printf("%s: %08x", rname, reg32); in kdb_rd()
1902 u32 reg32; in kdb_rm() local
1941 reg32 = reg64; in kdb_rm()
1942 dbg_set_reg(i, &reg32, kdb_current_regs); in kdb_rm()
/linux-4.4.14/drivers/net/wireless/realtek/rtl818x/rtl8180/
Ddev.c816 u32 reg32; in rtl8180_init_hw() local
967 reg32 = rtl818x_ioread32(priv, &priv->map->RF_PARA); in rtl8180_init_hw()
968 reg32 &= 0x00ffff00; in rtl8180_init_hw()
969 reg32 |= 0xb8000054; in rtl8180_init_hw()
970 rtl818x_iowrite32(priv, &priv->map->RF_PARA, reg32); in rtl8180_init_hw()
/linux-4.4.14/drivers/net/wireless/realtek/rtl818x/rtl8187/
Ddev.c1535 u32 reg32; in rtl8187_probe() local
1536 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF); in rtl8187_probe()
1537 reg32 &= RTL818X_TX_CONF_HWVER_MASK; in rtl8187_probe()
1538 switch (reg32) { in rtl8187_probe()
/linux-4.4.14/Documentation/filesystems/
Ddebugfs.txt165 The "base" argument may be 0, but you may want to build the reg32 array
/linux-4.4.14/drivers/net/ethernet/broadcom/
Dtg3.c2550 u32 reg32, phy9_orig; in tg3_phy_reset_5703_4_5() local
2564 if (tg3_readphy(tp, MII_TG3_EXT_CTRL, &reg32)) in tg3_phy_reset_5703_4_5()
2567 reg32 |= 0x3000; in tg3_phy_reset_5703_4_5()
2568 tg3_writephy(tp, MII_TG3_EXT_CTRL, reg32); in tg3_phy_reset_5703_4_5()
2606 err = tg3_readphy(tp, MII_TG3_EXT_CTRL, &reg32); in tg3_phy_reset_5703_4_5()
2610 reg32 &= ~0x3000; in tg3_phy_reset_5703_4_5()
2611 tg3_writephy(tp, MII_TG3_EXT_CTRL, reg32); in tg3_phy_reset_5703_4_5()