/linux-4.4.14/arch/x86/mm/ |
H A D | amdtopology.c | 39 header = read_pci_config(0, num, 0, 0x00); find_northbridge() 45 header = read_pci_config(0, num, 1, 0x00); find_northbridge() 90 reg = read_pci_config(0, nb, 0, 0x60); amd_numa_init() 101 base = read_pci_config(0, nb, 1, 0x40 + i*8); amd_numa_init() 102 limit = read_pci_config(0, nb, 1, 0x44 + i*8); amd_numa_init()
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/linux-4.4.14/arch/x86/pci/ |
H A D | amd_bus.c | 91 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); early_root_info_init() 115 reg = read_pci_config(bus, slot, 1, early_root_info_init() 142 reg = read_pci_config(bus, slot, 0, AMD_NB_F0_NODE_ID); early_root_info_init() 144 reg = read_pci_config(bus, slot, 0, AMD_NB_F0_UNIT_ID); early_root_info_init() 151 reg = read_pci_config(bus, slot, 1, 0xc0 + (i << 3)); early_root_info_init() 156 reg = read_pci_config(bus, slot, 1, 0xc4 + (i << 3)); early_root_info_init() 217 reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3)); early_root_info_init() 223 reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); early_root_info_init() 370 u32 val = read_pci_config(bus, slot, 3, 0); pci_enable_pci_io_ecs() 375 val = read_pci_config(bus, slot, 3, 0x8c); pci_enable_pci_io_ecs()
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H A D | early.c | 10 u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset) read_pci_config() function 72 val = read_pci_config(bus, slot, func, i); early_dump_pci_device() 94 class = read_pci_config(bus, slot, func, early_dump_pci_devices()
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H A D | broadcom_bus.c | 104 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); broadcom_postcore_init()
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/linux-4.4.14/arch/x86/kernel/ |
H A D | aperture_64.c | 150 aper_low = read_pci_config(bus, slot, func, 0x10); read_agp() 151 aper_hi = read_pci_config(bus, slot, func, 0x14); read_agp() 199 class = read_pci_config(bus, slot, func, search_agp_bridge() 284 if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) early_gart_iommu_check() 287 ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL); early_gart_iommu_check() 291 aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff; early_gart_iommu_check() 340 if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) early_gart_iommu_check() 343 ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL); early_gart_iommu_check() 385 if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) gart_iommu_hole_init() 392 ctl = read_pci_config(bus, slot, 3, gart_iommu_hole_init() 406 aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff; gart_iommu_hole_init() 497 if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) gart_iommu_hole_init()
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H A D | mmconf-fam10h_64.c | 82 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); get_fam10h_pci_mmconf_base() 122 reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3)); get_fam10h_pci_mmconf_base() 127 reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); get_fam10h_pci_mmconf_base()
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H A D | vsmp_64.c | 96 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0); set_vsmp_pv_ops() 150 if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) == detect_vsmp_box() 190 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0); vsmp_cap_cpus()
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H A D | early_printk.c | 256 cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND); early_pci_serial_init() 257 classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION); early_pci_serial_init() 258 bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0); early_pci_serial_init()
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H A D | early-quirks.c | 34 htcfg = read_pci_config(num, slot, func, 0x68); fix_hypertransport_config() 112 d = read_pci_config(num, slot, func, 0x70); ati_ixp4x0_rev() 116 d = read_pci_config(num, slot, func, 0x8); ati_ixp4x0_rev() 151 d = read_pci_config(num, slot, func, 0x8); ati_sbx00_rev() 177 d = read_pci_config(num, slot, func, 0x64); ati_bugs_contd() 238 base = read_pci_config(num, slot, func, 0x5c); intel_stolen_base()
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H A D | pci-calgary_64.c | 1295 val = read_pci_config(bus, dev, 0, 0); calgary_bus_has_devices() 1335 val = read_pci_config(bus, 0, 0, 0); get_tce_space_from_tar() 1436 val = read_pci_config(bus, 0, 0, 0); detect_calgary()
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/linux-4.4.14/arch/x86/include/asm/ |
H A D | pci-direct.h | 9 extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);
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/linux-4.4.14/arch/powerpc/kernel/ |
H A D | rtas_pci.c | 43 static int read_pci_config; variable 80 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); rtas_read_config() 231 read_pci_config = rtas_token("read-pci-config"); init_pci_config_tokens()
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/linux-4.4.14/drivers/usb/early/ |
H A D | ehci-dbgp.c | 399 class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION); __find_dbgp() 688 dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, nvidia_set_debug_port() 701 vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, detect_set_debug_port() 725 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot, early_ehci_bios_handoff() 740 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot, early_ehci_bios_handoff() 857 debug_port = read_pci_config(bus, slot, func, cap); early_dbgp_init() 868 bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0); early_dbgp_init()
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/linux-4.4.14/drivers/firewire/ |
H A D | init_ohci1394_dma.c | 256 ohci_base = read_pci_config(num, slot, func, PCI_BASE_ADDRESS_0+(0<<2)) init_ohci1394_controller() 282 class = read_pci_config(num, slot, func, init_ohci1394_dma_on_all_controllers()
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/linux-4.4.14/arch/x86/lguest/ |
H A D | boot.c | 1249 if (read_pci_config(0, 1, 0, 0) != 0x10431AF4) { probe_pci_console() 1251 read_pci_config(0, 1, 0, 0)); probe_pci_console() 1267 offset = read_pci_config(0, 1, 0, probe_pci_console() 1269 length = read_pci_config(0, 1, 0, probe_pci_console()
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/linux-4.4.14/arch/x86/kernel/cpu/ |
H A D | amd.c | 564 val = read_pci_config(0, 24, 0, 0x68); early_init_amd()
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