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Searched refs:rFPGA0_XAB_RFInterfaceSW (Results 1 – 13 of 13) sorted by relevance

/linux-4.4.14/drivers/staging/rtl8188eu/hal/
Dbb_cfg.c604 reg[RF_PATH_A]->rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl88e_phy_init_bb_rf_register_definition()
605 reg[RF_PATH_B]->rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl88e_phy_init_bb_rf_register_definition()
Dphy.c1089 rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, in phy_iq_calibrate()
1125 phy_set_bb_reg(adapt, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0x01); in phy_iq_calibrate()
1126 phy_set_bb_reg(adapt, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0x01); in phy_iq_calibrate()
/linux-4.4.14/drivers/staging/rtl8723au/hal/
Drtl8723a_phycfg.c451 pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; in phy_InitBBRFRegisterDefinition()
453 pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; in phy_InitBBRFRegisterDefinition()
DHalDMOutSrc8723A_CE.c745 rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, in _PHY_IQCalibrate()
780 PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0x01); in _PHY_IQCalibrate()
781 PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0x01); in _PHY_IQCalibrate()
Dusb_halinit.c621 rtl8723au_write32(Adapter, rFPGA0_XAB_RFInterfaceSW, 0x07000760); in rtl8723au_hal_init()
/linux-4.4.14/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h81 #define rFPGA0_XAB_RFInterfaceSW 0x870 macro
Dr8192E_phy.c395 priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
396 priv->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
/linux-4.4.14/drivers/staging/rtl8192u/
Dr819xU_phyreg.h68 #define rFPGA0_XAB_RFInterfaceSW 0x870 macro
Dr819xU_phy.c573 priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
575 priv->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
/linux-4.4.14/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h114 #define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Ctrl */ macro
/linux-4.4.14/drivers/staging/rtl8188eu/include/
Drtw_mp_phy_regdef.h141 #define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ macro
DHal8188EPhyReg.h98 #define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Iface Software Control */ macro
/linux-4.4.14/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h92 #define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ macro