Searched refs:rFPGA0_TxGainStage (Results 1 – 11 of 11) sorted by relevance
628 reg[RF_PATH_A]->rfTxGainStage = rFPGA0_TxGainStage; in rtl88e_phy_init_bb_rf_register_definition()629 reg[RF_PATH_B]->rfTxGainStage = rFPGA0_TxGainStage; in rtl88e_phy_init_bb_rf_register_definition()630 reg[RF_PATH_C]->rfTxGainStage = rFPGA0_TxGainStage; in rtl88e_phy_init_bb_rf_register_definition()631 reg[RF_PATH_D]->rfTxGainStage = rFPGA0_TxGainStage; in rtl88e_phy_init_bb_rf_register_definition()
425 priv->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; in _rtl92e_init_bb_rf_reg_def()426 priv->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; in _rtl92e_init_bb_rf_reg_def()427 priv->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; in _rtl92e_init_bb_rf_reg_def()428 priv->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; in _rtl92e_init_bb_rf_reg_def()580 rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage, in _rtl92e_bb_config_para_file()663 rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage, in rtl92e_set_tx_power()
58 #define rFPGA0_TxGainStage 0x80c macro
625 priv->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; in rtl8192_InitBBRFRegDef()626 priv->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; in rtl8192_InitBBRFRegDef()627 priv->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; in rtl8192_InitBBRFRegDef()628 priv->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; in rtl8192_InitBBRFRegDef()828 rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC), in rtl8192_BB_Config_ParaFile()
42 #define rFPGA0_TxGainStage 0x80c macro
483 pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; in phy_InitBBRFRegisterDefinition()484 pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; in phy_InitBBRFRegisterDefinition()
88 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro
334 set_bb_reg(pAdapter, rFPGA0_TxGainStage, in r8712_SetTxAGCOffset()
110 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro
76 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro
60 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro