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Searched refs:rFPGA0_IQK (Results 1 – 5 of 5) sorted by relevance

/linux-4.4.14/drivers/staging/rtl8188eu/hal/
Dphy.c671 phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000); in phy_path_a_rx_iqk()
681 phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); in phy_path_a_rx_iqk()
722 phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000); in phy_path_a_rx_iqk()
727 phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); in phy_path_a_rx_iqk()
753 phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000); in phy_path_a_rx_iqk()
970 phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x0); in path_a_standby()
972 phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); in path_a_standby()
1149 phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000); in phy_iq_calibrate()
1216 phy_set_bb_reg(adapt, rFPGA0_IQK, bMaskDWord, 0); in phy_iq_calibrate()
/linux-4.4.14/drivers/staging/rtl8723au/hal/
DHalDMOutSrc8723A_CE.c649 rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x0); in _PHY_PathAStandBy()
651 rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x80800000); in _PHY_PathAStandBy()
802 rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x80800000); in _PHY_IQCalibrate()
857 rtl8723au_write32(pAdapter, rFPGA0_IQK, 0); in _PHY_IQCalibrate()
Dodm.c1619 rtl8723au_write32(adapter, rFPGA0_IQK, 0x80800000); in ODM_SingleDualAntennaDetection()
1658 rtl8723au_write32(adapter, rFPGA0_IQK, 0x00000000); in ODM_SingleDualAntennaDetection()
/linux-4.4.14/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h259 #define rFPGA0_IQK 0xe28 macro
/linux-4.4.14/drivers/staging/rtl8188eu/include/
DHal8188EPhyReg.h297 #define rFPGA0_IQK 0xe28 macro