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Searched refs:rCCK0_AFESetting (Results 1 – 10 of 10) sorted by relevance

/linux-4.4.14/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h104 #define rCCK0_AFESetting 0xa04 macro
Drtl_dm.c2096 rtl92e_set_bb_reg(dev, rCCK0_AFESetting, 0x0f000000, in _rtl92e_dm_rx_path_sel_byrssi()
/linux-4.4.14/drivers/staging/rtl8192u/
Dr819xU_phyreg.h92 #define rCCK0_AFESetting 0xa04 macro
Dr8192U_dm.c2635 rtl8192_setBBreg(dev, rCCK0_AFESetting, 0x0f000000, DM_RxPathSelTable.cck_Rx_path); in dm_rxpath_sel_byrssi()
/linux-4.4.14/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h152 #define rCCK0_AFESetting 0xa04 /* Disable init gain now */ macro
Drtl871x_mp.c491 set_bb_reg(pAdapter, rCCK0_AFESetting, bMaskByte3, cck_ant_sel_val); in r8712_SwitchAntenna()
/linux-4.4.14/drivers/staging/rtl8188eu/include/
Drtw_mp_phy_regdef.h176 #define rCCK0_AFESetting 0xa04 /* Disable init gain now Select RX path by RSSI */ macro
DHal8188EPhyReg.h139 #define rCCK0_AFESetting 0xa04 macro
/linux-4.4.14/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h125 #define rCCK0_AFESetting 0xa04 /* Disable init gain now Select RX path by RSSI */ macro
/linux-4.4.14/drivers/staging/rtl8723au/hal/
Drtl8723a_phycfg.c642 PHY_SetBBReg(Adapter, rCCK0_AFESetting, bMaskByte3, 0x45); in phy_BB8192C_Config_1T()