Searched refs:r600_count_pipe_bits (Results 1 – 4 of 4) sorted by relevance
724 static int r600_count_pipe_bits(uint32_t val) in r600_count_pipe_bits() function884 r600_count_pipe_bits((cc_rb_backend_disable & in r600_gfx_init()909 …R6XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config & R600_INACTIVE_QD_PIPES_MASK) >> … in r600_gfx_init()1541 r600_count_pipe_bits((cc_rb_backend_disable & in r700_gfx_init()1572 …R7XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config & R600_INACTIVE_QD_PIPES_MASK) >> … in r700_gfx_init()
1315 r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R7XX_MAX_SIMDS_MASK); in rv770_gpu_init()1390 …num_qd_pipes = R7XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config & INACTIVE_QD_PIPES… in rv770_gpu_init()
1940 req_rb_num = total_max_rb_num - r600_count_pipe_bits(disabled_rb_mask); in r6xx_remap_render_backend()1972 int r600_count_pipe_bits(uint32_t val) in r600_count_pipe_bits() function2109 r600_count_pipe_bits((cc_gc_shader_pipe_config >> 16) & R6XX_MAX_SIMDS_MASK); in r600_gpu_init()2133 …tmp = R6XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config & INACTIVE_QD_PIPES_MASK) >>… in r600_gpu_init()
376 int r600_count_pipe_bits(uint32_t val);