Searched refs:pxclk (Results 1 - 7 of 7) sorted by relevance

/linux-4.4.14/arch/powerpc/platforms/85xx/
H A Dp1022_rdk.c48 u32 pxclk; p1022rdk_set_pixel_clock() local
70 * 'pxclk' is the ratio of the platform clock to the pixel clock. p1022rdk_set_pixel_clock()
74 pxclk = DIV_ROUND_CLOSEST(fsl_get_sys_freq(), freq); p1022rdk_set_pixel_clock()
75 pxclk = clamp_t(u32, pxclk, 2, 255); p1022rdk_set_pixel_clock()
81 /* Enable the clock and set the pxclk */ p1022rdk_set_pixel_clock()
82 setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16)); p1022rdk_set_pixel_clock()
H A Dp1022_ds.c378 u32 pxclk; p1022ds_set_pixel_clock() local
400 * 'pxclk' is the ratio of the platform clock to the pixel clock. p1022ds_set_pixel_clock()
404 pxclk = DIV_ROUND_CLOSEST(fsl_get_sys_freq(), freq); p1022ds_set_pixel_clock()
405 pxclk = clamp_t(u32, pxclk, 2, 255); p1022ds_set_pixel_clock()
411 /* Enable the clock and set the pxclk */ p1022ds_set_pixel_clock()
412 setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16)); p1022ds_set_pixel_clock()
/linux-4.4.14/arch/powerpc/platforms/86xx/
H A Dmpc8610_hpcd.c234 u32 pxclk; mpc8610hpcd_set_pixel_clock() local
256 * 'pxclk' is the ratio of the platform clock to the pixel clock. mpc8610hpcd_set_pixel_clock()
260 pxclk = DIV_ROUND_CLOSEST(fsl_get_sys_freq(), freq) - 1; mpc8610hpcd_set_pixel_clock()
261 pxclk = clamp_t(u32, pxclk, 2, 31); mpc8610hpcd_set_pixel_clock()
267 /* Enable the clock and set the pxclk */ mpc8610hpcd_set_pixel_clock()
268 setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16)); mpc8610hpcd_set_pixel_clock()
/linux-4.4.14/drivers/gpu/drm/nouveau/
H A Dnouveau_bios.h172 int nouveau_bios_parse_lvds_table(struct drm_device *, int pxclk,
175 int head, int pxclk);
177 enum LVDS_script, int pxclk);
H A Dnouveau_bios.c68 static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk) clkcmptable() argument
80 if (pxclk >= compareclk * 10) { clkcmptable()
136 static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) run_lvds_table() argument
141 * A bitmask byte and a dual-link transition pxclk value for use in run_lvds_table()
197 scriptptr = clkcmptable(bios, clktable, pxclk); run_lvds_table()
209 int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) call_lvds_script() argument
230 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk); call_lvds_script()
234 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk); call_lvds_script()
236 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk); call_lvds_script()
246 ret = run_lvds_table(dev, dcbent, head, script, pxclk); call_lvds_script()
495 int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit) nouveau_bios_parse_lvds_table() argument
500 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if nouveau_bios_parse_lvds_table()
520 * until later, when this function should be called with non-zero pxclk nouveau_bios_parse_lvds_table()
540 if (!pxclk) nouveau_bios_parse_lvds_table()
552 if (pxclk >= bios->fp.duallink_transition_clk) nouveau_bios_parse_lvds_table()
568 if (pxclk >= bios->fp.duallink_transition_clk) nouveau_bios_parse_lvds_table()
570 if (pxclk >= 140000) nouveau_bios_parse_lvds_table()
618 if (pxclk && (chip_version < 0x25 || chip_version > 0x28)) nouveau_bios_parse_lvds_table()
619 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); nouveau_bios_parse_lvds_table()
626 int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk) run_tmds_table() argument
629 * the pxclk parameter is in kHz run_tmds_table()
664 scriptptr = clkcmptable(bios, clktable, pxclk); run_tmds_table()
673 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000); run_tmds_table()
919 * Offset +11 has a pointer to a table where the first word is a pxclk parse_bit_tmds_tbl_entry()
921 * run if the comparison pxclk frequency is less than the pxclk desired. parse_bit_tmds_tbl_entry()
/linux-4.4.14/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.h147 * 0x08 or 0x09 pxclk in MHz
H A Ddfp.c540 /* pxclk of 0 is fine for PANEL_OFF, and for a nv04_lvds_dpms()

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