Searched refs:pwr_mgmt_1 (Results 1 - 2 of 2) sorted by relevance

/linux-4.4.14/drivers/iio/imu/inv_mpu6050/
H A Dinv_mpu_core.c55 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
122 ret = inv_mpu6050_write_reg_unlocked(st, st->reg->pwr_mgmt_1, inv_mpu6050_select_bypass()
153 inv_mpu6050_write_reg_unlocked(st, st->reg->pwr_mgmt_1, inv_mpu6050_deselect_bypass()
170 st->reg->pwr_mgmt_1, 1, &mgmt_1); inv_mpu6050_switch_engine()
181 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1, mgmt_1); inv_mpu6050_switch_engine()
205 st->reg->pwr_mgmt_1, mgmt_1); inv_mpu6050_switch_engine()
221 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1, inv_mpu6050_set_power_itg()
228 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1, inv_mpu6050_set_power_itg()
740 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1, inv_check_and_setup_chip()
H A Dinv_mpu_iio.h39 * @pwr_mgmt_1: Controls chip's power state and clock source.
55 u8 pwr_mgmt_1; member in struct:inv_mpu6050_reg_map

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