Searched refs:prev_sclk (Results 1 – 4 of 4) sorted by relevance
1598 u32 prev_sclk = 0; in sumo_construct_sclk_voltage_mapping_table() local1601 if (table[i].ulSupportedSCLK > prev_sclk) { in sumo_construct_sclk_voltage_mapping_table()1606 prev_sclk = table[i].ulSupportedSCLK; in sumo_construct_sclk_voltage_mapping_table()
2458 u32 prev_sclk; in ni_populate_power_containment_values() local2502 prev_sclk = state->performance_levels[i-1].sclk; in ni_populate_power_containment_values()2507 if (max_sclk < prev_sclk) in ni_populate_power_containment_values()2510 if ((max_ps_percent == 0) || (prev_sclk == max_sclk) || eg_pi->uvd_enabled) in ni_populate_power_containment_values()2513 min_sclk = prev_sclk; in ni_populate_power_containment_values()2515 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in ni_populate_power_containment_values()
2293 u32 prev_sclk; in si_populate_power_containment_values() local2322 prev_sclk = state->performance_levels[i-1].sclk; in si_populate_power_containment_values()2329 if (prev_sclk > max_sclk) in si_populate_power_containment_values()2333 (prev_sclk == max_sclk) || in si_populate_power_containment_values()2337 min_sclk = prev_sclk; in si_populate_power_containment_values()2339 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
149 u32 prev_sclk = 0; in sumo_construct_sclk_voltage_mapping_table() local152 if (table[i].ulSupportedSCLK > prev_sclk) { in sumo_construct_sclk_voltage_mapping_table()157 prev_sclk = table[i].ulSupportedSCLK; in sumo_construct_sclk_voltage_mapping_table()