H A D | pm80xx_hwi.c | 127 accum_len = pm8001_mr32(fatal_table_address, pm80xx_get_fatal_dump() 228 reg_val = pm8001_mr32(fatal_table_address, pm80xx_get_fatal_dump() 241 if (pm8001_mr32(fatal_table_address, pm80xx_get_fatal_dump() 272 pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); read_main_config_table() 274 pm8001_mr32(address, MAIN_INTERFACE_REVISION); read_main_config_table() 276 pm8001_mr32(address, MAIN_FW_REVISION); read_main_config_table() 278 pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); read_main_config_table() 280 pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); read_main_config_table() 282 pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); read_main_config_table() 284 pm8001_mr32(address, MAIN_GST_OFFSET); read_main_config_table() 286 pm8001_mr32(address, MAIN_IBQ_OFFSET); read_main_config_table() 288 pm8001_mr32(address, MAIN_OBQ_OFFSET); read_main_config_table() 292 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); read_main_config_table() 294 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); read_main_config_table() 296 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); read_main_config_table() 298 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); read_main_config_table() 302 pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); read_main_config_table() 306 pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); read_main_config_table() 309 pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); read_main_config_table() 311 pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); read_main_config_table() 314 pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); read_main_config_table() 325 pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); read_general_status_table() 327 pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); read_general_status_table() 329 pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); read_general_status_table() 331 pm8001_mr32(address, GST_MSGUTCNT_OFFSET); read_general_status_table() 333 pm8001_mr32(address, GST_IOPTCNT_OFFSET); read_general_status_table() 335 pm8001_mr32(address, GST_GPIO_INPUT_VAL); read_general_status_table() 337 pm8001_mr32(address, GST_RERRINFO_OFFSET0); read_general_status_table() 339 pm8001_mr32(address, GST_RERRINFO_OFFSET1); read_general_status_table() 341 pm8001_mr32(address, GST_RERRINFO_OFFSET2); read_general_status_table() 343 pm8001_mr32(address, GST_RERRINFO_OFFSET3); read_general_status_table() 345 pm8001_mr32(address, GST_RERRINFO_OFFSET4); read_general_status_table() 347 pm8001_mr32(address, GST_RERRINFO_OFFSET5); read_general_status_table() 349 pm8001_mr32(address, GST_RERRINFO_OFFSET6); read_general_status_table() 351 pm8001_mr32(address, GST_RERRINFO_OFFSET7); read_general_status_table() 361 pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); read_phy_attr_table() 363 pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); read_phy_attr_table() 365 pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); read_phy_attr_table() 367 pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); read_phy_attr_table() 369 pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); read_phy_attr_table() 371 pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); read_phy_attr_table() 373 pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); read_phy_attr_table() 375 pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); read_phy_attr_table() 377 pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); read_phy_attr_table() 379 pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); read_phy_attr_table() 381 pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); read_phy_attr_table() 383 pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); read_phy_attr_table() 385 pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); read_phy_attr_table() 387 pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); read_phy_attr_table() 389 pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); read_phy_attr_table() 391 pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); read_phy_attr_table() 394 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); read_phy_attr_table() 396 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); read_phy_attr_table() 398 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); read_phy_attr_table() 400 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); read_phy_attr_table() 402 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); read_phy_attr_table() 404 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); read_phy_attr_table() 406 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); read_phy_attr_table() 408 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); read_phy_attr_table() 410 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); read_phy_attr_table() 412 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); read_phy_attr_table() 414 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); read_phy_attr_table() 416 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); read_phy_attr_table() 418 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); read_phy_attr_table() 420 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); read_phy_attr_table() 422 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); read_phy_attr_table() 424 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); read_phy_attr_table() 439 get_pci_bar_index(pm8001_mr32(address, read_inbnd_queue_table() 442 pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); read_inbnd_queue_table() 457 get_pci_bar_index(pm8001_mr32(address, read_outbnd_queue_table() 460 pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); read_outbnd_queue_table() 513 get_pci_bar_index(pm8001_mr32(addressib, init_default_table_values() 516 pm8001_mr32(addressib, (offsetib + 0x18)); init_default_table_values() 541 get_pci_bar_index(pm8001_mr32(addressob, init_default_table_values() 544 pm8001_mr32(addressob, (offsetob + 0x18)); init_default_table_values() 675 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, mpi_init_check() 1181 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, mpi_uninit_check()
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