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Searched refs:pll_type (Results 1 – 9 of 9) sorted by relevance

/linux-4.4.14/drivers/ssb/
Ddriver_mipscore.c267 u32 pll_type, n, m, rate = 0; in ssb_cpu_clock() local
273 ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m); in ssb_cpu_clock()
275 ssb_chipco_get_clockcpu(&bus->chipco, &pll_type, &n, &m); in ssb_cpu_clock()
279 if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) { in ssb_cpu_clock()
282 rate = ssb_calc_clock_rate(pll_type, n, m); in ssb_cpu_clock()
285 if (pll_type == SSB_PLLTYPE_6) { in ssb_cpu_clock()
Ddriver_extif.c108 u32 *pll_type, u32 *n, u32 *m) in ssb_extif_get_clockcontrol() argument
110 *pll_type = SSB_PLLTYPE_1; in ssb_extif_get_clockcontrol()
/linux-4.4.14/drivers/clk/rockchip/
Dclk-pll.c343 struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, in rockchip_clk_register_pll() argument
379 if (pll_type == pll_rk3066) in rockchip_clk_register_pll()
423 switch (pll_type) { in rockchip_clk_register_pll()
436 pll->type = pll_type; in rockchip_clk_register_pll()
Dclk.h158 struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
/linux-4.4.14/drivers/media/dvb-frontends/
Ddrxd.h35 u8 pll_type; member
/linux-4.4.14/drivers/media/pci/ngene/
Dngene-cards.c341 feconf->pll_type)) { in tuner_attach_dtt7520x()
342 pr_err("No pll(%d) found!\n", feconf->pll_type); in tuner_attach_dtt7520x()
714 .pll_type = DVB_PLL_THOMSON_DTT7520X,
725 .pll_type = DVB_PLL_THOMSON_DTT7520X,
/linux-4.4.14/drivers/clk/
Dclk-xgene.c163 static void xgene_pllclk_init(struct device_node *np, enum xgene_pll_type pll_type) in xgene_pllclk_init() argument
177 CLK_IS_ROOT, reg, 0, pll_type, &clk_lock); in xgene_pllclk_init()
Dclk-vt8500.c650 static __init void vtwm_pll_clk_init(struct device_node *node, int pll_type) in vtwm_pll_clk_init() argument
673 pll_clk->type = pll_type; in vtwm_pll_clk_init()
/linux-4.4.14/drivers/media/usb/em28xx/
Dem28xx-dvb.c389 .pll_type = DRXD_PLL_NONE,