Searched refs:pll_readl (Results 1 – 2 of 2) sorted by relevance
| /linux-4.4.14/drivers/clk/pistachio/ |
| D | clk-pll.c | 81 static inline u32 pll_readl(struct pistachio_clk_pll *pll, u32 reg) in pll_readl() function
93 while (!(pll_readl(pll, PLL_STATUS) & PLL_STATUS_LOCK)) in pll_lock()
113 val = pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_DSMPD; in pll_frac_get_mode()
122 val = pll_readl(pll, PLL_CTRL3); in pll_frac_set_mode()
165 val = pll_readl(pll, PLL_CTRL3); in pll_gf40lp_frac_enable()
170 val = pll_readl(pll, PLL_CTRL4); in pll_gf40lp_frac_enable()
184 val = pll_readl(pll, PLL_CTRL3); in pll_gf40lp_frac_disable()
193 return !(pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_PD); in pll_gf40lp_frac_is_enabled()
229 val = pll_readl(pll, PLL_CTRL1); in pll_gf40lp_frac_set_rate()
236 val = pll_readl(pll, PLL_CTRL2); in pll_gf40lp_frac_set_rate()
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| /linux-4.4.14/drivers/clk/tegra/ |
| D | clk-pll.c | 186 #define pll_readl(offset, p) readl_relaxed(p->clk_base + offset) macro
187 #define pll_readl_base(p) pll_readl(p->params->base_reg, p)
188 #define pll_readl_misc(p) pll_readl(p->params->misc_reg, p)
885 val = pll_readl(pll->params->iddq_reg, pll); in clk_pll_iddq_enable()
911 val = pll_readl(pll->params->iddq_reg, pll); in clk_pll_iddq_disable()
1303 val = pll_readl(pll->params->aux_reg, pll); in clk_plle_tegra114_enable()
1318 val = pll_readl(PLLE_SS_CTRL, pll); in clk_plle_tegra114_enable()
1338 val = pll_readl(PLLE_SS_CTRL, pll); in clk_plle_tegra114_enable()
1355 val = pll_readl(pll->params->aux_reg, pll); in clk_plle_tegra114_enable()
1363 val = pll_readl(XUSBIO_PLL_CFG0, pll); in clk_plle_tegra114_enable()
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