Searched refs:pll_locked (Results 1 - 4 of 4) sorted by relevance
/linux-4.4.14/drivers/media/tuners/ |
H A D | max2165.c | 235 u8 pll_locked; max2165_debug_status() local 245 pll_locked = (status >> 4) & 0x01; max2165_debug_status() 256 dprintk("PLL locked: %d\n", pll_locked); max2165_debug_status()
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/linux-4.4.14/drivers/gpu/drm/msm/dsi/pll/ |
H A D | dsi_pll_28nm.c | 102 bool pll_locked = false; pll_28nm_poll_for_ready() local 107 pll_locked = !!(val & DSI_28nm_PHY_PLL_STATUS_PLL_RDY); pll_28nm_poll_for_ready() 109 if (pll_locked) pll_28nm_poll_for_ready() 114 DBG("DSI PLL is %slocked", pll_locked ? "" : "*not* "); pll_28nm_poll_for_ready() 116 return pll_locked; pll_28nm_poll_for_ready()
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/linux-4.4.14/arch/arm/mach-tegra/ |
H A D | sleep-tegra30.S | 116 .macro pll_locked, rd, r_car_base, pll_base 376 pll_locked r1, r0, CLK_RESET_PLLM_BASE 377 pll_locked r1, r0, CLK_RESET_PLLP_BASE 378 pll_locked r1, r0, CLK_RESET_PLLA_BASE 379 pll_locked r1, r0, CLK_RESET_PLLC_BASE 380 pll_locked r1, r0, CLK_RESET_PLLX_BASE
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/linux-4.4.14/drivers/gpu/drm/mgag200/ |
H A D | mgag200_mode.c | 228 bool pll_locked = false; mga_g200wb_set_plls() local 302 for (i = 0; i <= 32 && pll_locked == false; i++) { mga_g200wb_set_plls() 382 for (j = 0; j < 30 && pll_locked == false; j++) { mga_g200wb_set_plls() 387 pll_locked = true; mga_g200wb_set_plls() 501 bool pll_locked = false; mga_g200eh_set_plls() local 535 for (i = 0; i <= 32 && pll_locked == false; i++) { mga_g200eh_set_plls() 572 for (j = 0; j < 30 && pll_locked == false; j++) { mga_g200eh_set_plls() 577 pll_locked = true; mga_g200eh_set_plls()
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