Searched refs:pll_flags (Results 1 – 7 of 7) sorted by relevance
323 amdgpu_crtc->pll_flags = AMDGPU_PLL_USE_FRAC_FB_DIV; in amdgpu_atombios_crtc_adjust_pll()340 amdgpu_crtc->pll_flags |= AMDGPU_PLL_USE_REF_DIV; in amdgpu_atombios_crtc_adjust_pll()342 amdgpu_crtc->pll_flags |= AMDGPU_PLL_USE_FRAC_FB_DIV; in amdgpu_atombios_crtc_adjust_pll()351 amdgpu_crtc->pll_flags |= AMDGPU_PLL_PREFER_CLOSEST_LOWER; in amdgpu_atombios_crtc_adjust_pll()353 amdgpu_crtc->pll_flags |= AMDGPU_PLL_IS_LCD; in amdgpu_atombios_crtc_adjust_pll()434 amdgpu_crtc->pll_flags |= AMDGPU_PLL_USE_FRAC_FB_DIV; in amdgpu_atombios_crtc_adjust_pll()435 amdgpu_crtc->pll_flags |= AMDGPU_PLL_USE_REF_DIV; in amdgpu_atombios_crtc_adjust_pll()439 amdgpu_crtc->pll_flags |= AMDGPU_PLL_USE_FRAC_FB_DIV; in amdgpu_atombios_crtc_adjust_pll()440 amdgpu_crtc->pll_flags |= AMDGPU_PLL_USE_POST_DIV; in amdgpu_atombios_crtc_adjust_pll()771 pll->flags = amdgpu_crtc->pll_flags; in amdgpu_atombios_crtc_set_pll()
403 u32 pll_flags; member
569 radeon_crtc->pll_flags = 0; in atombios_adjust_pll()575 radeon_crtc->pll_flags |= (/*RADEON_PLL_USE_FRAC_FB_DIV |*/ in atombios_adjust_pll()579 radeon_crtc->pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; in atombios_adjust_pll()581 radeon_crtc->pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; in atombios_adjust_pll()584 radeon_crtc->pll_flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP; in atombios_adjust_pll()587 radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV; in atombios_adjust_pll()590 radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV; in atombios_adjust_pll()592 radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV; in atombios_adjust_pll()594 radeon_crtc->pll_flags |= RADEON_PLL_LEGACY; in atombios_adjust_pll()597 radeon_crtc->pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; in atombios_adjust_pll()[all …]
363 u32 pll_flags; member
52 unsigned long (*pll_flags)(struct smiapp_sensor *sensor); member
135 u8 pll_flags; member154 .pll_flags = _pflags, \
210 list->pll_flags, &clk_lock); in rockchip_clk_register_plls()